Skip to content
GitLab
Explore
Sign in
EE-LV
CSPP
TASCA
UTCS
Repository
UTCS
UTCS.lvproj
Find file
Blame
History
Permalink
Assign FPGA high frequency signals in and out to a second line driver. Rebuild UTCS.exe.
· cb2fa709
Holger Brand
authored
Jun 15, 2018
cb2fa709