Packages/UTCS/BeamControl/FPGA/UTCS_BC_FPGA.lvlib · ea2231e3bbb83a73a36f401ca77e5baace4bd969 · EE-LV / CSPP / TASCA / UTCS · GitLab

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Use positive logic for Chopper/Interlock/Inhibt output sinals. Add Auxilliary Interlock inputs. · ea2231e3
Holger Brand authored Jun 18, 2018

ea2231e3

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