Commit 228359fa authored by Jaeger's avatar Jaeger
Browse files

Entry in ini file fixed. FPGA need more improvements.

parent 181ebf35
......@@ -425,7 +425,7 @@ UTCS_BMIL:UTCS_BCIL.Dipole-F2I-Offset=-15.128
UTCS_BMIL:UTCS_BCIL.Dipole-IMax=0
UTCS_BMIL:UTCS_BCIL.Dipole-IMin=0
UTCS_BMIL:UTCS_BCIL.Dipole-I2V-Calibration="0.0,0.013333"
UTCS_BMIL:UTCS_BCIL.Dipole-V2I-Calibration="0.0,75.0
UTCS_BMIL:UTCS_BCIL.Dipole-V2I-Calibration="0.0,75.0"
[BMIL.URLs]
PollingCounter="ni.var.psp://kcpc080/UTCS_BMIL_SV/BMIL_PollingCounter"
PollingDeltaT="ni.var.psp://kcpc080/UTCS_BMIL_SV/BMIL_PollingDeltaT"
......
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