Recompile FPGA with Counter input assigned to Connector1/DIO1 (Connector1/DIO0...

Recompile FPGA with Counter input assigned to Connector1/DIO1 (Connector1/DIO0 is defect due to emergency power break) Update description of interlock reason indicator in other VIs.

Recompile FPGA with Counter input assigned to Connector1/DIO1 (Connector1/DIO0...
Recompile FPGA with Counter input assigned to Connector1/DIO1 (Connector1/DIO0 is defect due to emergency power break) Update description of interlock reason indicator in other VIs.
c5ac4015 · Holger Brand · 6548230a · c5ac4015 · c5ac4015 · c5ac4015
Commit c5ac4015 authored Mar 06, 2019 by Holger Brand
--- a/Packages/UTCS/BeamControl-GUI/Actor/Actor Core.vi
+++ b/Packages/UTCS/BeamControl-GUI/Actor/Actor Core.vi
--- a/Packages/UTCS/BeamControl/FPGA Bitfiles/UTCS_PXI-7813R_Main.lvbitx
+++ b/Packages/UTCS/BeamControl/FPGA Bitfiles/UTCS_PXI-7813R_Main.lvbitx
--- a/Packages/UTCS/BeamControl/FPGA/Main.vi
+++ b/Packages/UTCS/BeamControl/FPGA/Main.vi
--- a/Packages/UTCS/Interlock-GUI/Actor/Actor Core.vi
+++ b/Packages/UTCS/Interlock-GUI/Actor/Actor Core.vi
--- a/UTCS_HB.lvproj
+++ b/UTCS_HB.lvproj