Commits · 06f222db5932ec63fe00392c37801633e8c7662f · EE-LV / CSPP / TASCA / UTCS

08 Jan, 2020 1 commit
- New FPGA works with watchdog handling. · 06f222db
  Jaeger authored Jan 08, 2020
```
Signed-off-by: Jaeger <she_oper@gsi.de>
```
  06f222db
07 Jan, 2020 3 commits
- RecompileBMIL-FPGA and check watchdog behavior. It works, but HW signignal... · 380ccb34
  Jaeger authored Jan 07, 2020
```
RecompileBMIL-FPGA and check watchdog behavior. It works, but HW signignal connection need to be checked!

Signed-off-by: Holger Brand <H.Brand@gsi.de>
```
  380ccb34
- Move items from dependencies to project. · 5eea3031
  Holger Brand authored Jan 07, 2020
  
  5eea3031
- Update CSPP submodules · 7b9deeb5
  Holger Brand authored Jan 07, 2020
  
  7b9deeb5
19 Dec, 2019 1 commit
- Build UTCS App & Installer · 7c8e54e5
  r.a.cantemir authored Dec 19, 2019
  
  7c8e54e5
18 Dec, 2019 3 commits
- Check FPGA Bitfile-Ref; prepare Acc-Interface on SHCPC005; add MU1-Dipole Power Supply SV. · bb2d9e07
  r.a.cantemir authored Dec 18, 2019
  
  bb2d9e07
- GUX8MU1 Power Supply implemented · d6926899
  r.a.cantemir authored Dec 18, 2019
  
  d6926899
- Update submodules; Compile FPGA for PXI-7842R · 9c7dceef
  Holger Brand authored Dec 18, 2019
  
  9c7dceef
18 Nov, 2019 1 commit
- Merge branch 'master' into LV2019 · a017ee08
  Holger Brand authored Nov 18, 2019
```
# Conflicts:
#	UTCS_HB.lvproj
```
  a017ee08
18 Jul, 2019 1 commit
- Rebuild FPGA, application and installer now with ACC-Interface. · ba2d9f53
  Holger Brand authored Jul 18, 2019
  
  ba2d9f53
12 Jul, 2019 2 commits
- Rebuild UTCS · 3e790163
  Holger Brand authored Jul 12, 2019
  
  3e790163
- Open with LV2019, but don't save. LV2019 support for PXI-7813R seems to be... · 40ad4563
  Holger Brand authored Jul 12, 2019
```
Open with LV2019, but don't save. LV2019 support for PXI-7813R seems to be stopped due to ended support of Xilinx VIRTEX II in new version ofVivando Tools .
```
  40ad4563
27 May, 2019 1 commit
- Update submodule; Main-App actor can now be specified explicitly. · eab600e9
  Holger Brand authored May 27, 2019
  
  eab600e9
23 May, 2019 1 commit
- Correct description of interlock reason.; rearrange project, rebuild app & installer. · 311b4f7b
  Holger Brand authored May 23, 2019
  
  311b4f7b
22 May, 2019 4 commits
- Adjust SV.libs · 24419379
  Holger Brand authored May 22, 2019
  
  24419379
- update submodule · 2554b09f
  Holger Brand authored May 22, 2019
  
  2554b09f
- Update submodules. · 688661a1
  Holger Brand authored May 22, 2019
  
  688661a1
- Update submodules · 01df7d13
  Holger Brand authored May 22, 2019
  
  01df7d13
20 May, 2019 3 commits
- Update submodules · 79605924
  Holger Brand authored May 20, 2019
  
  79605924
- Add submodule CSPP_Vacuum · 62b58dc1
  Holger Brand authored May 20, 2019
  
  62b58dc1
- Remove CSPP_TPG300 (will be added with CSPP_Vacuum in next step) · 76d5124c
  Holger Brand authored May 20, 2019
  
  76d5124c
29 Apr, 2019 1 commit
- Add Watchdog PV-Monitoring and BMIL-FPGA-SW-Watchdog. · 28150802
  Holger Brand authored Apr 29, 2019
  
  28150802
24 Apr, 2019 2 commits
- Rename VI with respect to modifications in CSPP_Core. · 1ae13964
  Holger Brand authored Apr 24, 2019
  
  1ae13964
- Add Handle WatchdogPollingStopped Msg; update submodules · 8364a3e8
  Holger Brand authored Apr 24, 2019
  
  8364a3e8
23 Apr, 2019 1 commit
- Update submodules; adopt to CSPP_Core modifications; add Watchdog to MainGUI. · 28a6f9e3
  Holger Brand authored Apr 23, 2019
  
  28a6f9e3
25 Mar, 2019 1 commit
- Invert Chopper_status via SV scaling; configure SV logging for Chopper_status... · d2dcb8aa
  Holger Brand authored Mar 25, 2019
```
Invert Chopper_status via SV scaling; configure SV logging for Chopper_status and Interlock reason. Closes #4 #5
```
  d2dcb8aa
06 Mar, 2019 1 commit

Recompile FPGA with Counter input assigned to Connector1/DIO1 (Connector1/DIO0... · c5ac4015

Holger Brand authored Mar 06, 2019

Recompile FPGA with Counter input assigned to Connector1/DIO1 (Connector1/DIO0 is defect due to emergency power break)
Update description of interlock reason indicator in other VIs.

c5ac4015

05 Mar, 2019 1 commit
- Correct SV name in event case Enable-Targetwheel-IL · 6548230a
  Holger Brand authored Mar 05, 2019
  
  6548230a
01 Mar, 2019 4 commits
- Build UTCS installer · 5330bf05
  Holger Brand authored Mar 01, 2019
  
  5330bf05
- Enable Enable_Targetwheel Interlock with Proxy_Activate. · cc5fa6d6
  Holger Brand authored Mar 01, 2019
  
  cc5fa6d6
- Change targetwheell interlock logic on FPGA and indicatator coloring on BeamControlGUI. · 666077cc
  Holger Brand authored Mar 01, 2019
```
Handle AmbientTemperature=NaN for Pyrometer correctly.
```
  666077cc
- Adapt SV.libs to kcpc080 · 9acee93c
  she_oper authored Mar 01, 2019
  
  9acee93c
28 Feb, 2019 2 commits
- UTCS Release 1.0.0.0 and Installer 1.18.1 based on LV2018 · 33dd6e64
  Holger Brand authored Feb 28, 2019
  
  33dd6e64
- Prepare for build with Pyrometerintegration and target wheel interlock. · 7ccdbc46
  Holger Brand authored Feb 28, 2019
  
  7ccdbc46
27 Feb, 2019 1 commit
- Extend CSPP_IGA140; ad settings class; add GUI actor; update submodule IGA140. · c312a3c4
  Holger Brand authored Feb 27, 2019
  
  c312a3c4
21 Feb, 2019 3 commits
- update submodule · c1522c65
  Holger Brand authored Feb 21, 2019
  
  c1522c65
- Add IGA140 Pyrometer · e6d2e8b1
  Holger Brand authored Feb 21, 2019
  
  e6d2e8b1
- Add IGA140 as submodule · 1817019b
  Holger Brand authored Feb 21, 2019
  
  1817019b
20 Feb, 2019 2 commits
- update submodudule · 09cc66a4
  Holger Brand authored Feb 20, 2019
  
  09cc66a4
- Add targetwheel interlock; sparate code from some VIs; update some submodules. · 06f08761
  Holger Brand authored Feb 20, 2019
  
  06f08761