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VITO

Project information

This is a data acquisition project using FPGA for the VITO experiment @ISOLDE/CERN. This project could become extended for a full AF/CS++ based control system for VITO. Licensed under the EUPL. https://joinup.ec.europa.eu/collection/eupl/eupl-text-e

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README

Created on

November 17, 2020

Copy SSH clone URLgit@git.gsi.de:EE-LV/CSPP/VITO/VITO.git
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