diff --git a/silecs-communication-cpp/src/silecs-communication/interface/core/SilecsService.cpp b/silecs-communication-cpp/src/silecs-communication/interface/core/SilecsService.cpp
index 82774b4a5284715c86661b52bc2ca8adb3a29f53..d765f08aef9e66393aa1038eff4e9e9419e7c504 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/core/SilecsService.cpp
+++ b/silecs-communication-cpp/src/silecs-communication/interface/core/SilecsService.cpp
@@ -207,15 +207,6 @@ namespace Silecs
return semverPatch_;
}
- SynchroType Service::whichSynchroType(std::string type)
- {
- StringUtilities::toLower(type);
- if (type == "master") return Master;
- else if (type == "slave") return Slave;
- else if (type == "none") return No;
- else throw SilecsException(__FILE__, __LINE__, DATA_UNKNOWN_SYNCHRO_TYPE, type);
- }
-
bool Service::withInputAccess(AccessType& accessType)
{ return (accessType != Output);
}
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/core/SilecsService.h b/silecs-communication-cpp/src/silecs-communication/interface/core/SilecsService.h
index d6ade6bb5b1f5217a2880314d89839cbd6aedf14..ea98f9b741b6e7e302430c51a3f5721cf0db00e5 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/core/SilecsService.h
+++ b/silecs-communication-cpp/src/silecs-communication/interface/core/SilecsService.h
@@ -25,11 +25,6 @@
namespace Silecs
{
- // Register and Block synchronization type
- typedef enum
- { Master, Slave, No
- } SynchroType;
-
/// @cond
// Register and Block access types
typedef enum
@@ -160,7 +155,6 @@ namespace Silecs
void printArgs();
static const std::string getParamsFilesPath();
- static SynchroType whichSynchroType(std::string type);
static bool withInputAccess(AccessType& accessType);
static bool withOutputAccess(AccessType& accessType);
static bool fileExists(std::string filename);
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/equipment/CNVBlock.cpp b/silecs-communication-cpp/src/silecs-communication/interface/equipment/CNVBlock.cpp
index 53080f534936322b6f7180d564455ad8b5f36b46..6818c53a12f52429c21af2af96fe00ba00a2101a 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/equipment/CNVBlock.cpp
+++ b/silecs-communication-cpp/src/silecs-communication/interface/equipment/CNVBlock.cpp
@@ -65,7 +65,7 @@ namespace Silecs
CNVInputBlock::CNVInputBlock(PLC* thePLC, ElementXML blockNode, AccessType accessType) :
CNVBlock(thePLC, blockNode, accessType)
{
- if (DEBUG & Log::topics_) LOG(ALLOC) << "Block (create): " << name_ << ", CNV: " << getPLC()->getName() << ", access: Input" << ", hasMaster: " << (hasMasterRegister() ? "yes" : "no") << ", hasSlave: " << (hasSlaveRegister() ? "yes" : "no") << ", address: " << address_ << ", mem-size: " << memSize_ ;//<< ", buffer-size: " << bufferSize_;
+ if (DEBUG & Log::topics_) LOG(ALLOC) << "Block (create): " << name_ << ", CNV: " << getPLC()->getName() << ", access: Input" << ", address: " << address_ << ", mem-size: " << memSize_ ;//<< ", buffer-size: " << bufferSize_;
handle_ = NULL;
subscriptionFlag_ = false;
@@ -269,7 +269,7 @@ namespace Silecs
CNVOutputBlock::CNVOutputBlock(PLC* thePLC, ElementXML blockNode, AccessType accessType) :
CNVBlock(thePLC, blockNode, accessType)
{
- if (DEBUG & Log::topics_) LOG(ALLOC) << "Block (create): " << name_ << ", CNV: " << getPLC()->getName() << ", access: Output" << ", hasMaster: " << (hasMasterRegister() ? "yes" : "no") << ", hasSlave: " << (hasSlaveRegister() ? "yes" : "no") << ", address: " << address_ << ", mem-size: " << memSize_;// << ", buffer-size: " << bufferSize_;
+ if (DEBUG & Log::topics_) LOG(ALLOC) << "Block (create): " << name_ << ", CNV: " << getPLC()->getName() << ", access: Output" << ", address: " << address_ << ", mem-size: " << memSize_;// << ", buffer-size: " << bufferSize_;
/* ALLOCATE THE BUFFER */
deviceVectorType deviceCol = thePLC->getDeviceMap();
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/equipment/PLCBlock.cpp b/silecs-communication-cpp/src/silecs-communication/interface/equipment/PLCBlock.cpp
index 69a3b8af823d889596a310f9808da4519f67693e..b144357b739eb4149002513dc0d550fc6289c67a 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/equipment/PLCBlock.cpp
+++ b/silecs-communication-cpp/src/silecs-communication/interface/equipment/PLCBlock.cpp
@@ -52,7 +52,7 @@ namespace Silecs
InputBlock::InputBlock(PLC* thePLC,ElementXML blockNode, AccessType accessType) :
PLCBlock(thePLC, blockNode, accessType)
{
- if (DEBUG & Log::topics_) LOG(ALLOC) << "Block (create): " << name_ << ", plc: " << getPLC()->getName() << ", access: Input" << ", hasMaster: " << (hasMasterRegister() ? "yes" : "no") << ", hasSlave: " << (hasSlaveRegister() ? "yes" : "no") << ", address: " << address_ << ", mem-size: " << memSize_ << ", buffer-size: " << bufferSize_;
+ if (DEBUG & Log::topics_) LOG(ALLOC) << "Block (create): " << name_ << ", plc: " << getPLC()->getName() << ", access: Input" << ", address: " << address_ << ", mem-size: " << memSize_ << ", buffer-size: " << bufferSize_;
// Creates receive task which relies on the block exchange
if (getPLC()->getProtocolID() == BlockMode)
@@ -73,7 +73,7 @@ namespace Silecs
OutputBlock::OutputBlock(PLC* thePLC,ElementXML blockNode, AccessType accessType) :
PLCBlock(thePLC, blockNode, accessType)
{
- if (DEBUG & Log::topics_) LOG(ALLOC) << "Block (create): " << name_ << ", plc: " << getPLC()->getName() << ", access: Output" << ", hasMaster: " << (hasMasterRegister() ? "yes" : "no") << ", hasSlave: " << (hasSlaveRegister() ? "yes" : "no") << ", address: " << address_ << ", mem-size: " << memSize_ << ", buffer-size: " << bufferSize_;
+ if (DEBUG & Log::topics_) LOG(ALLOC) << "Block (create): " << name_ << ", plc: " << getPLC()->getName() << ", access: Output" << ", address: " << address_ << ", mem-size: " << memSize_ << ", buffer-size: " << bufferSize_;
// Creates send task which relies on the block exchange
if (getPLC()->getProtocolID() == BlockMode)
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsBlock.cpp b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsBlock.cpp
index bb4ee710446c48b2db3dd6c1c178dcefc5f6d3dc..44667bf9a60a60f7036444541f46dd5fc7918614 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsBlock.cpp
+++ b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsBlock.cpp
@@ -29,7 +29,7 @@ namespace Silecs
{
Block::Block(PLC* thePLC, ElementXML blockNode, AccessType accessType) :
- thePLC_ (thePLC), hasMaster_(false), hasSlave_(false)
+ thePLC_ (thePLC)
{
std::string designName = blockNode.getAttribute("name");
@@ -44,21 +44,6 @@ namespace Silecs
* and the accessType is given by the caller.
*/
accessType_ = accessType;
-
- // Adjust the synchro-type of the block relying on its own registers
- // . hasMaster if the block contains 1 MASTER register at least
- // . hasSlave if the block contains 1 SLAVE register at least
- // can be a mix or none if only Volatile registers
- std::vector< boost::shared_ptr<ElementXML> > registerNodes = blockNode.childList_;
- std::vector< boost::shared_ptr<ElementXML> >::const_iterator registerIter;
- for(registerIter = registerNodes.begin(); registerIter != registerNodes.end(); registerIter++)
- {
- std::string synchro = (*registerIter)->getAttribute("synchro");
- if (!hasMaster_ && Service::whichSynchroType(synchro) == Master)
- hasMaster_ = true;
- if (!hasSlave_ && Service::whichSynchroType(synchro) == Slave)
- hasSlave_ = true;
- }
}
Block::~Block()
@@ -72,10 +57,9 @@ namespace Silecs
AccessType Block::whichAccessType(std::string type)
{
- StringUtilities::toLower(type);
- if (type == "write-only") return Output;
- else if (type == "read-only") return Input;
- else if (type == "read-write") return InOut;
+ if (type == "Acquisition-Block") return Input;
+ else if (type == "Command-Block") return Output;
+ else if (type == "Setting-Block") return InOut;
else throw SilecsException(__FILE__, __LINE__, DATA_UNKNOWN_ACCESS_TYPE, type);
}
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsBlock.h b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsBlock.h
index 01dbdace83662e1df0d54febf71c68eb814d09ce..a0cdfb623c6af425383a359d7187acbc271f01ca 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsBlock.h
+++ b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsBlock.h
@@ -49,8 +49,8 @@ namespace Silecs
static AccessType whichAccessType(std::string type);
static std::string whichAccessType(AccessType type);
- inline bool hasInputAccess() { return (accessType_ != Output); }
- inline bool hasOutputAccess() { return (accessType_ != Input); }
+ inline bool isReadable() { return (accessType_ != Output); }
+ inline bool isWritable() { return (accessType_ != Input); }
inline PLC* getPLC() { return thePLC_; }
inline std::string& getName() { return name_; }
@@ -59,8 +59,6 @@ namespace Silecs
inline unsigned long& getMemSize() { return memSize_; }
inline Task<WrapperAction>* getTask() { return pTask_; }
inline void* getBuffer() { return pBuffer_; }
- inline bool hasMasterRegister() { return hasMaster_; }
- inline bool hasSlaveRegister() { return hasSlave_; }
/// @cond
void setCustomAttributes(const unsigned long customAddress, const unsigned long customOffset, const unsigned long customSize);
@@ -109,12 +107,6 @@ namespace Silecs
// Send/Receive data buffer
void *pBuffer_;
-
- /// True if the block contains 1 MASTER and/or 1 Slave register at least
- /// MASTER en SLAVE registers can be mixed in the same block.
- /// Only Volatile (NONE) ==> both are false
- bool hasMaster_;
- bool hasSlave_;
};
} // namespace
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsDevice.cpp b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsDevice.cpp
index 9994de5c33ffc7519d2bf7384986e15f78cb5a5e..088852570e742e23e3a3140ebdede214b8e093dd 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsDevice.cpp
+++ b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsDevice.cpp
@@ -46,7 +46,7 @@ namespace Silecs
{
std::string blockName = blockIter->getAttribute("name");
LOG(ALLOC) << "Adding Block to Device: " << blockName;
- AccessType accessType = Block::whichAccessType(blockIter->getAttribute("mode"));
+ AccessType accessType = Block::whichAccessType(blockIter->name_);
std::vector< boost::shared_ptr<ElementXML> > registerNodes = blockIter->childList_;
instantiateRegisters(blockName, accessType, registerNodes);
}
@@ -213,65 +213,36 @@ namespace Silecs
void Device::importRegisters(Block* pBlock, void* pBuffer, timeval ts, Context* pContext)
{
std::vector<Register*>& registerCol = getRegisterCollection(pBlock->getName());
+ std::vector<Register*>::iterator pReg;
+ for (pReg=registerCol.begin(); pReg<registerCol.end(); pReg++)
+ {
+ // do not update volatile registers for sync (client has to force a transaction himself if required).
+ if( !(*pReg)->isVolatile() || !pContext->isForSynchronization() )
+ {
+ if((*pReg)->getFormat() == String)
+ (*pReg)->importString(pBuffer, ts);
+ else
+ (*pReg)->importValue(pBuffer, ts);
+ }
+ }
- if (pContext->isForSynchronization())
- { // Transaction has been done within the context of retentive registers synchronization,
- // do not update volatile registers (client has to force a transaction himself if required).
- for (unsigned int i=0; i<registerCol.size(); i++)
- {
- Register* pReg = registerCol[i];
- if (pReg->isRetentive())
- {
- if(pReg->getFormat() == String)
- pReg->importString(pBuffer, ts);
- else // all registers but those having string format
- pReg->importValue(pBuffer, ts);
- }
- }
- }
- else
- { // It's a normal transaction from the client process,
- // all registers of the block have to be updated.
- for (unsigned int i=0; i<registerCol.size(); i++)
- {
- if(registerCol[i]->getFormat() == String)
- registerCol[i]->importString(pBuffer, ts);
- else // all registers but those having string format
- registerCol[i]->importValue(pBuffer, ts);
- }
- }
}
void Device::exportRegisters(Block* pBlock, void* pBuffer, Context* pContext)
{
- std::vector<Register*>& registerCol = getRegisterCollection(pBlock->getName());
-
- if (pContext->isForSynchronization())
- { // Transaction has been done within the context of retentive registers synchronization,
- // do not update volatile register (client has to force a transaction himself if required).
- for (unsigned int i=0; i<registerCol.size(); i++)
- {
- Register* pReg = registerCol[i];
- if (pReg->isRetentive())
- {
- if(pReg->getFormat() == String)
- pReg->exportString(pBuffer);
- else // all registers but those having string format
- pReg->exportValue(pBuffer);
- }
- }
- }
- else
- { // It's a normal transaction from the client process,
- // all registers of the block have to be updated.
- for (unsigned int i=0; i<registerCol.size(); i++)
- {
- if(registerCol[i]->getFormat() == String)
- registerCol[i]->exportString(pBuffer);
- else
- registerCol[i]->exportValue(pBuffer);
- }
- }
+ std::vector<Register*>& registerCol = getRegisterCollection(pBlock->getName());
+ std::vector<Register*>::iterator pReg;
+ for (pReg=registerCol.begin(); pReg<registerCol.end(); pReg++)
+ {
+ // do not update volatile registers for sync (client has to force a transaction himself if required).
+ if( !(*pReg)->isVolatile() || !pContext->isForSynchronization() )
+ {
+ if((*pReg)->getFormat() == String)
+ (*pReg)->exportString(pBuffer);
+ else
+ (*pReg)->exportValue(pBuffer);
+ }
+ }
}
void Device::copyInToOut(const std::string blockName)
@@ -279,7 +250,7 @@ namespace Silecs
std::vector<Register*>& registerCol = getRegisterCollection(blockName);
for (unsigned int i=0; i<registerCol.size(); i++)
{ Register* pReg = registerCol[i];
- if (pReg->hasInputAccess() && pReg->hasOutputAccess())
+ if (pReg->isReadable() && pReg->isWritable())
pReg->copyValue();
}
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsPLC.cpp b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsPLC.cpp
index 6b08a4956922a5550d1448a0340324a5cc3dfa1f..6c29b4d7ef6dac16f767b329b35a8d78f73e3d64 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsPLC.cpp
+++ b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsPLC.cpp
@@ -233,7 +233,7 @@ namespace Silecs
blockVectorType::iterator blockIter;
for (blockIter = blockCol_.begin();blockIter!= blockCol_.end(); blockIter ++)
{
- if ((*blockIter)->hasInputAccess())
+ if ((*blockIter)->isReadable())
{
deviceVectorType::iterator pDeviceIter;
for(pDeviceIter = deviceCol_.begin(); pDeviceIter != deviceCol_.end(); ++pDeviceIter)
@@ -377,8 +377,7 @@ namespace Silecs
for(classIter = classNodes.begin(); classIter != classNodes.end(); classIter++)
{
std::string className = (*classIter)->getAttribute("name");
-
- boost::ptr_vector<ElementXML> blockNodes = xmlParser.getElementsFromXPath_throwIfEmpty("/SILECS-Param/SILECS-Mapping/SILECS-Class[@name='"+ className + "']/Block");
+ boost::ptr_vector<ElementXML> blockNodes = xmlParser.getElementsFromXPath_throwIfEmpty("/SILECS-Param/SILECS-Mapping/SILECS-Class[@name='"+ className + "']/*[ name()='Acquisition-Block' or name()='Setting-Block' or name()='Command-Block']");
boost::ptr_vector<ElementXML>::const_iterator blockIter;
boost::ptr_vector<ElementXML> instanceNodes = xmlParser.getElementsFromXPath_throwIfEmpty("/SILECS-Param/SILECS-Mapping/SILECS-Class[@name='"+ className + "']/Instance");
@@ -396,8 +395,8 @@ namespace Silecs
for(blockIter = blockNodes.begin(); blockIter != blockNodes.end(); blockIter++)
{
std::string blockName = (*blockIter).getAttribute("name");
- AccessType accessType = Block::whichAccessType((*blockIter).getAttribute("mode"));
- LOG((DIAG)) << "The block '" << blockName << " will be created with access-type: '" << accessType << "'.";
+ AccessType accessType = Block::whichAccessType((*blockIter).name_);
+ LOG((DIAG)) << "The block '" << blockName << " of type '"<< (*blockIter).name_ << "' will be created.";
Block* pBlock = 0;
// Instantiate Input blocks ------------------------------------------------------
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsRegister.cpp b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsRegister.cpp
index c38f7e631b4db5bd4759700121e7d9403eb6bf42..5b4bf9076d39cf0ed442df6290dc3cba7e484fbb 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsRegister.cpp
+++ b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsRegister.cpp
@@ -53,16 +53,15 @@ namespace Silecs
StringUtilities::fromString(size_,registerNode->getAttribute("size") );
StringUtilities::fromString(memSize_,registerNode->getAttribute("mem-size") );
StringUtilities::fromString(address_,registerNode->getAttribute("address") );
- synchro_ = Service::whichSynchroType(registerNode->getAttribute("synchro"));
isInitialized_ = false; //register not initialized yet (used for output registers)
if (length_ > 1)
{
- LOG(DEBUG) << "Register (create): " << name_ << ", format: " << getFormatAsString() << ", string-length: " << length_ << ", dim: " << dimension1_ << ", dim2: " << dimension2_ << ", synchro: " << getSynchroTypeAsString() << ", offset: " << address_;
+ LOG(DEBUG) << "Register (create): " << name_ << ", format: " << getFormatAsString() << ", string-length: " << length_ << ", dim: " << dimension1_ << ", dim2: " << dimension2_ << ", offset: " << address_;
}
else
{
- LOG(DEBUG) << "Register (create): " << name_ << ", format: " << getFormatAsString() << ", dim: " << dimension1_ << ", dim2: " << dimension2_ << ", synchro: " << getSynchroTypeAsString() << ", offset: " << address_;
+ LOG(DEBUG) << "Register (create): " << name_ << ", format: " << getFormatAsString() << ", dim: " << dimension1_ << ", dim2: " << dimension2_ << ", offset: " << address_;
}
}
@@ -111,7 +110,7 @@ namespace Silecs
template <typename T>
inline T Register::getVal(FormatType F)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if ((format_ != F) || !isScalar())
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -121,7 +120,7 @@ namespace Silecs
template <typename T>
inline void Register::getValArray(FormatType F, T* pValue, uint32_t dim)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if ((format_ != F) || !isSingleArray())
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -133,7 +132,7 @@ namespace Silecs
template <typename T>
inline void Register::getValArray2D(FormatType F, T* pValue, uint32_t dim1, uint32_t dim2)
{
- if(!hasInputAccess())
+ if(!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if((format_ != F) || !isDoubleArray())
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -145,7 +144,7 @@ namespace Silecs
template <typename Tsrc, typename Tdst>
inline void Register::convGetValArray(FormatType F, Tdst* pValue, uint32_t dim)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if ((format_ != F) || !isSingleArray())
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -159,7 +158,7 @@ namespace Silecs
template <typename Tsrc, typename Tdst>
inline void Register::convGetValArray2D(FormatType F, Tdst* pValue, uint32_t dim1, uint32_t dim2)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if((format_ != F) || !isDoubleArray())
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -173,7 +172,7 @@ namespace Silecs
template <typename T>
inline T* Register::getRefArray(FormatType F, uint32_t& dim)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if ((format_ != F) || !isSingleArray())
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -184,7 +183,7 @@ namespace Silecs
template <typename T>
inline T* Register::getRefArray2D(FormatType F, uint32_t& dim1, uint32_t& dim2)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if((format_ != F) || !isDoubleArray())
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -197,7 +196,7 @@ namespace Silecs
// No template for string format
std::string Register::getValString()
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if ((format_ != String) || (dimension1_ != 1)|| (dimension2_ != 1))
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -207,7 +206,7 @@ namespace Silecs
void Register::getValStringArray(std::string* pVal, uint32_t dim)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if (format_ != String)
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -221,7 +220,7 @@ namespace Silecs
void Register::getValStringArray2D(std::string* pVal, uint32_t dim1, uint32_t dim2)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if (format_ != String)
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -237,7 +236,7 @@ namespace Silecs
const std::string** Register::getRefStringArray(uint32_t& dim)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if (dimension1_ <= 1)
throw SilecsException(__FILE__, __LINE__, PARAM_ARRAY_DIMENSION_MISMATCH, getName());
@@ -247,7 +246,7 @@ namespace Silecs
const std::string** Register::getRefStringArray2D(uint32_t& dim1, uint32_t& dim2)
{
- if (!hasInputAccess())
+ if (!isReadable())
throw SilecsException(__FILE__, __LINE__, DATA_READ_ACCESS_TYPE_MISMATCH, getName());
if (dimension2_ <= 1)
throw SilecsException(__FILE__, __LINE__, PARAM_ARRAY_DIMENSION_MISMATCH, getName());
@@ -427,20 +426,12 @@ namespace Silecs
pSendValue_ = calloc(dimension1_*dimension2_, size_);
}
}
-
- /* The synchronization mode and the Access type of the register must be compatible:
- * - Read-only register cannot have SLAVE synchronization (not supported: has to be Read-Write register)
- * - Write-only register cannot have MASTER synchronization (does not make sense)
- */
- if ( ((accessType_ == Input) && (synchro_ == Slave) ) ||
- ((accessType_ == Output) && (synchro_ == Master) ))
- throw SilecsException(__FILE__, __LINE__, DATA_SYNCHRO_ACCESS_TYPE_MISMATCH, name_);
}
template <typename T>
inline void Register::setVal(FormatType F, T val)
{
- if (!hasOutputAccess())
+ if (!isWritable())
throw SilecsException(__FILE__, __LINE__, DATA_WRITE_ACCESS_TYPE_MISMATCH, getName());
if ((format_ != F) || (dimension1_ != 1))
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -451,7 +442,7 @@ namespace Silecs
template <typename T>
inline void Register::setValArray(FormatType F, const T* pVal, uint32_t dim)
{
- if (!hasOutputAccess())
+ if (!isWritable())
throw SilecsException(__FILE__, __LINE__, DATA_WRITE_ACCESS_TYPE_MISMATCH, getName());
if (format_ != F)
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -464,7 +455,7 @@ namespace Silecs
template <typename T>
inline void Register::setValArray2D(FormatType F, const T* pVal, uint32_t dim1, uint32_t dim2)
{
- if (!hasOutputAccess())
+ if (!isWritable())
throw SilecsException(__FILE__, __LINE__, DATA_WRITE_ACCESS_TYPE_MISMATCH, getName());
if (format_ != F)
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -477,7 +468,7 @@ namespace Silecs
template <typename Tsrc, typename Tdst>
inline void Register::convSetValArray(FormatType F, const Tsrc* pVal, uint32_t dim)
{
- if (!hasOutputAccess())
+ if (!isWritable())
throw SilecsException(__FILE__, __LINE__, DATA_WRITE_ACCESS_TYPE_MISMATCH, getName());
if (format_ != F)
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -492,7 +483,7 @@ namespace Silecs
template <typename Tsrc, typename Tdst>
inline void Register::convSetValArray2D(FormatType F, const Tsrc* pVal, uint32_t dim1, uint32_t dim2)
{
- if (!hasOutputAccess())
+ if (!isWritable())
throw SilecsException(__FILE__, __LINE__, DATA_WRITE_ACCESS_TYPE_MISMATCH, getName());
if (format_ != F)
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -508,7 +499,7 @@ namespace Silecs
// No template for string format
void Register::setValString(std::string val)
{
- if (!hasOutputAccess())
+ if (!isWritable())
throw SilecsException(__FILE__, __LINE__, DATA_WRITE_ACCESS_TYPE_MISMATCH, getName());
if ((format_ != String) || (dimension1_ != 1)|| (dimension2_ != 1))
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -520,7 +511,7 @@ namespace Silecs
void Register::setValStringArray(const std::string* pVal, uint32_t dim)
{
- if (!hasOutputAccess())
+ if (!isWritable())
throw SilecsException(__FILE__, __LINE__, DATA_WRITE_ACCESS_TYPE_MISMATCH, getName());
if (format_ != String)
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -536,7 +527,7 @@ namespace Silecs
void Register::setValStringArray2D(const std::string* pVal, uint32_t dim1, uint32_t dim2)
{
- if (!hasOutputAccess())
+ if (!isWritable())
throw SilecsException(__FILE__, __LINE__, DATA_WRITE_ACCESS_TYPE_MISMATCH, getName());
if (format_ != String)
throw SilecsException(__FILE__, __LINE__, PARAM_FORMAT_TYPE_MISMATCH, getName());
@@ -653,14 +644,11 @@ namespace Silecs
FormatType Register::getFormat() { return format_; }
std::string Register::getBlockName() { return blockName_; }
std::string Register::getFormatAsString() { return FormatTypeString[format_]; }
- SynchroType Register::getSynchroType() { return synchro_; }
- std::string Register::getSynchroTypeAsString() { return SynchroTypeString[synchro_]; }
- bool Register::hasInputAccess() { return (accessType_ != Output); }
- bool Register::hasOutputAccess() { return (accessType_ != Input); }
+ bool Register::isReadable() { return (accessType_ != Output); }
+ bool Register::isWritable() { return (accessType_ != Input); }
- bool Register::isRetentive() { return (synchro_ != No); }
- bool Register::isVolatile() { return (synchro_ == No); }
+ bool Register::isVolatile(){ return isVolatile_; }
bool Register::isScalar() { return ((dimension1_ == 1) && (dimension2_ == 1)); }
bool Register::isSingleArray() { return ((dimension1_ > 1) && (dimension2_ == 1)); }
bool Register::isDoubleArray() { return (dimension2_ > 1); }
@@ -786,7 +774,7 @@ namespace Silecs
std::string Register::getInputValAsString(unsigned long i) { return getInputValAsString(i, 0); };
std::string Register::getInputValAsString(unsigned long i, unsigned long j)
{
- if (hasInputAccess())
+ if (isReadable())
{ return getValAsString(pRecvValue_,i,j);
}
else
@@ -798,7 +786,7 @@ namespace Silecs
std::string Register::getOutputValAsString(unsigned long i) { return getOutputValAsString(i, 0); };
std::string Register::getOutputValAsString(unsigned long i, unsigned long j)
{
- if (hasOutputAccess())
+ if (isWritable())
{ return getValAsString(pSendValue_,i,j);
}
else
@@ -858,14 +846,14 @@ namespace Silecs
timeval Register::getTimeStamp()
{
- if (hasInputAccess()) return tod_;
+ if (isReadable()) return tod_;
throw SilecsException(__FILE__, __LINE__, PARAM_NO_TIME_STAMP, getName());
}
std::string Register::getTimeStampAsString()
{
- if (hasInputAccess())
+ if (isReadable())
{
std::ostringstream os;
double ts = (double)tod_.tv_sec + (double)tod_.tv_usec/1000000.0; //second
@@ -880,17 +868,17 @@ namespace Silecs
void Register::printVal()
{
std::ostringstream os;
- os << getName() << " " << getFormatAsString() << "[" << dimension1_ << "][" << dimension2_ << "] " << getSynchroTypeAsString();
+ os << getName() << " " << getFormatAsString() << "[" << dimension1_ << "][" << dimension2_ << "] ";
if(getFormat() == String) os << ", string-length: " << getLength();
- if (hasInputAccess()) {
+ if (isReadable()) {
os << ", input: ";
for (unsigned int i=0; i<dimension1_; i++)
for (unsigned int j=0; j<dimension2_; j++)
os << getValAsString(pRecvValue_, i, j) << " ";
}
- if (hasOutputAccess()) {
+ if (isWritable()) {
os << ", output: ";
for (unsigned int i=0; i<dimension1_; i++)
for (unsigned int j=0; j<dimension2_; j++)
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsRegister.h b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsRegister.h
index 5a5023c2086fc704c0f8c4d8f71c54aee57735d9..66cd817b32434b39690374a7af61ba598e012267 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsRegister.h
+++ b/silecs-communication-cpp/src/silecs-communication/interface/equipment/SilecsRegister.h
@@ -53,16 +53,6 @@ namespace Silecs
"String" /*!<: String of ASCII characters*/
};
- // Register synchronization type
- static const std::string SynchroTypeString[] =
- {
- "Master", //register is retentive, PLC is the source
- "Slave", //register is retentive, client is the source
- "NoSynchro" //register is volatile
- };
- /// @endcond
-
-
/*!
* \brief Enumeration for the Register data type. Used by Register::getFormat() method.
* Each type has a PLC type equivalent (see below)
@@ -141,18 +131,6 @@ namespace Silecs
*/
uint32_t getLength();
- /*!
- * \brief Returns the synchronization type of the current register (Master, Slave or No)
- * \return value from the SynchroType enumeration
- */
- SynchroType getSynchroType();
-
- /*!
- * \brief Returns the synchronization type of the current register
- * \return String value of the Synchronization type ("Master", "Slave" or "NoSynchro")
- */
- std::string getSynchroTypeAsString();
-
/*!
* \brief Returns the name of the block which contains the register as defined in the Class design
* \return Block name of the register
@@ -167,26 +145,9 @@ namespace Silecs
*/
timeval getTimeStamp();
- /*!
- * \brief A register can have read-only, write-only or read-write access mode as defined in the Class design.
- * \return true if register has read-only or read-write access mode
- */
- bool hasInputAccess();
+ bool isReadable();
- /*!
- * \brief A register can have read-only, write-only or read-write access mode as defined in the Class design.
- * \return true if the register has write-only or read-write access mode
- */
- bool hasOutputAccess();
-
- /*!
- * \brief A retentive register can be a persistent or a constant data.
- * Its value must be initialized at the system start-up.
- * - From the client side if the synchro register is 'Slave'
- * - From the PLC side if the synchro register is 'Master'
- * \return true if the register has Master or Slave synchro as defined in the Class design
- */
- bool isRetentive();
+ bool isWritable();
/*!
* \brief A register that has not persistent or constant value is Volatile.
@@ -1681,9 +1642,6 @@ namespace Silecs
/// data address within the PLC memory (from the block base-address)
unsigned long address_;
- /// Synchronization mode: Master, Slave, No
- SynchroType synchro_;
-
/// Flag used to check if the register has been setted once at least.
/// Uploading Slave registers at connection time is allowed only if all
/// the retentive Slave registers are initialized!
@@ -1697,6 +1655,8 @@ namespace Silecs
/// Name of the "parent" Block name (for general information)
std::string blockName_;
+ bool isVolatile_;
+
// Time-of-day: number of seconds and microseconds since the POSIX.1 Epoch (00:00:00 UTC, January 1, 1970)
// Use to time-stamp the register coming from PLC (no time-stamping on send).
// FEC clock and Timing are synchronized using SNTP (common GPS source)
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/utility/SilecsException.cpp b/silecs-communication-cpp/src/silecs-communication/interface/utility/SilecsException.cpp
index ae114f73de6a4132a11092d48ae65043dab08814..8274e22457264fdb15506bcd7c8f1122122b4317 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/utility/SilecsException.cpp
+++ b/silecs-communication-cpp/src/silecs-communication/interface/utility/SilecsException.cpp
@@ -147,10 +147,6 @@ namespace Silecs
errCategory_ = DATA_FAULT;
errMessage_ = "Block Design has a wrong access-type: ";
break;
- case DATA_UNKNOWN_SYNCHRO_TYPE:
- errCategory_ = DATA_FAULT;
- errMessage_ = "Register Design has a wrong synchronization type: ";
- break;
case DATA_UNKNOWN_PLC_MANUFACTURER:
errCategory_ = DATA_FAULT;
errMessage_ = "Controller Deployment has a wrong manufacturer: ";
@@ -175,10 +171,6 @@ namespace Silecs
errCategory_ = DATA_FAULT;
errMessage_ = "Trying to write a read-only register: ";
break;
- case DATA_SYNCHRO_ACCESS_TYPE_MISMATCH:
- errCategory_ = DATA_FAULT;
- errMessage_ = "Synchronization and Access types of this register are not compatible: ";
- break;
case DATA_ARRAY_LENGTH_MISMATCH:
errCategory_ = DATA_FAULT;
errMessage_ = "ArrCOMM_BLOCK_RESIZING_NOT_ALLOWEDay length is not compatible: ";
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/utility/SilecsException.h b/silecs-communication-cpp/src/silecs-communication/interface/utility/SilecsException.h
index 5d1f5f8031dfab8bca75ef453bdd21c0dfa2a3c2..1cc455c255fe876a221bfc5ba00eb20fb97d6d1d 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/utility/SilecsException.h
+++ b/silecs-communication-cpp/src/silecs-communication/interface/utility/SilecsException.h
@@ -60,14 +60,12 @@ namespace Silecs
XML_DATA_TYPE_MISMATCH,
DATA_UNKNOWN_FORMAT_TYPE,
DATA_UNKNOWN_ACCESS_TYPE,
- DATA_UNKNOWN_SYNCHRO_TYPE,
DATA_UNKNOWN_PLC_MANUFACTURER,
DATA_UNKNOWN_PLC_MODEL,
DATA_UNKNOWN_PLC_SYSTEM,
DATA_UNKNOWN_PROTOCOL_MODE,
DATA_READ_ACCESS_TYPE_MISMATCH,
DATA_WRITE_ACCESS_TYPE_MISMATCH,
- DATA_SYNCHRO_ACCESS_TYPE_MISMATCH,
DATA_ARRAY_LENGTH_MISMATCH,
PARAM_INCORRECT_ARGUMENTS,
PARAM_FILE_NOT_FOUND,
diff --git a/silecs-communication-cpp/src/silecs-communication/interface/utility/XMLParser.h b/silecs-communication-cpp/src/silecs-communication/interface/utility/XMLParser.h
index 36b7849b11db2de8be06e48491940529a5b38b77..addc43c47470eaae14ac0d682f42e01b0075f2fd 100644
--- a/silecs-communication-cpp/src/silecs-communication/interface/utility/XMLParser.h
+++ b/silecs-communication-cpp/src/silecs-communication/interface/utility/XMLParser.h
@@ -66,7 +66,7 @@ class ElementXML
{
public:
/*!
- * \brief name of the element
+ * \brief name of the xml-node
*/
std::string name_;
diff --git a/silecs-diagnostic-cpp/src/silecs-diagnostic/diagnostictoolmainview.cpp b/silecs-diagnostic-cpp/src/silecs-diagnostic/diagnostictoolmainview.cpp
index 055a86ff51c09351bfa462cf345a96dec445c4c2..991e0e9f5e32a29f31bc660e7b09c1c57826bc35 100755
--- a/silecs-diagnostic-cpp/src/silecs-diagnostic/diagnostictoolmainview.cpp
+++ b/silecs-diagnostic-cpp/src/silecs-diagnostic/diagnostictoolmainview.cpp
@@ -535,7 +535,7 @@ void diagnosticToolMainView::on_treeWidget_doubleClicked(const QModelIndex &inde
markItemNotEdiable(itm);
return;
case 3:// double click performed on 3th column (local value)
- if(!reg->hasOutputAccess() )// is READ only for silecs or is wrong column
+ if(!reg->isWritable() )// is READ only for silecs or is wrong column
{
markItemNotEdiable(itm);
return;
diff --git a/silecs-diagnostic-cpp/src/silecs-diagnostic/silecsmodule.cpp b/silecs-diagnostic-cpp/src/silecs-diagnostic/silecsmodule.cpp
index e65d1e905d02546ef0bb96eefc3170181525fd11..b264bdea2c55a398421237893ce6739ea6587208 100755
--- a/silecs-diagnostic-cpp/src/silecs-diagnostic/silecsmodule.cpp
+++ b/silecs-diagnostic-cpp/src/silecs-diagnostic/silecsmodule.cpp
@@ -957,7 +957,7 @@ void silecsModule::updateDeviceItem(Item *deviceItem,bool updateInputBufferOnly)
// PLC values
try
{
- if(reg->hasInputAccess()) // is READ or READ+WRITE for silecs
+ if(reg->isReadable())
{
if(reg->isScalar())
{
@@ -987,7 +987,7 @@ void silecsModule::updateDeviceItem(Item *deviceItem,bool updateInputBufferOnly)
{
// local values
try{
- if(reg->hasOutputAccess()) // = is WRITE or READ+WRITE for silecs
+ if(reg->isWritable()) // = is WRITE or READ+WRITE for silecs
{
if(reg->isScalar())
{
diff --git a/silecs-diagnostic-cpp/src/silecs-diagnostic/utils.cpp b/silecs-diagnostic-cpp/src/silecs-diagnostic/utils.cpp
index 85d3dc1691ffd0717abb9c2d72d88e1ac5b842bb..1ea5bfd2cc371e8b39c13c8bd18ffc1b54a4dc2f 100755
--- a/silecs-diagnostic-cpp/src/silecs-diagnostic/utils.cpp
+++ b/silecs-diagnostic-cpp/src/silecs-diagnostic/utils.cpp
@@ -184,22 +184,14 @@ void Utils::displayRegisterInformation(Silecs::Register *reg,QTextEdit *console)
text.append("<li>Last update: "+reg->getTimeStampAsString()+"</li>");
// Access method
- if(reg->hasInputAccess() && reg->hasOutputAccess())
+ if(reg->isReadable() && reg->isWritable())
text.append("<li>Access method: Read / Write </li>");
else
{
- if(reg->hasInputAccess()) text.append("<li>Access method: Read only </li>");
+ if(reg->isReadable()) text.append("<li>Access method: Read only </li>");
else text.append("<li>Access method: Write only </li>");
}
- text.append("<li>Synchronization method: "+reg->getSynchroTypeAsString()+"</li>");
-
- // Retentive volatile
- if(reg->isRetentive())
- text.append("<li>Storage method: Retentive</li>");
- else
- text.append("<li>Storage method: Volatile</li>");
-
text.append("</ul>");
console->setText(QString::fromStdString(text));
@@ -214,7 +206,7 @@ void Utils::displayRegisterValue(Silecs::Register *reg,
)
{
- if(!reg->hasInputAccess()){
+ if(!reg->isReadable()){
binValueLabel->setText("--Write only register--");
hexValueLabel->setText("--Write only register--");
decValueLabel->setText("--Write only register--");