diff --git a/silecs-codegen/src/xml/fesa/fesa_3_0_0/generateFesaDesign.py b/silecs-codegen/src/xml/fesa/fesa_3_0_0/generateFesaDesign.py
index 9f0dc32e6a44b990fdc8d160bf9f77ae786ced40..d58d878dac2b6269d03d5c5c174df06685112d33 100644
--- a/silecs-codegen/src/xml/fesa/fesa_3_0_0/generateFesaDesign.py
+++ b/silecs-codegen/src/xml/fesa/fesa_3_0_0/generateFesaDesign.py
@@ -33,6 +33,7 @@ from iecommon import *
from fesaGeneral import *
from model.Register import DesignRegister
from model.Block import DesignBlock
+from model.Class import DesignClass
import libxml2
@@ -333,7 +334,7 @@ class FESADesignGenerator3_0_0(object):
# Generates the data node of the FESA design document
# parsing the SILECS class document
#-------------------------------------------------------------------------
- def genData(self,silecsRoot, doc,logTopics):
+ def genData(self,designClass, doc,logTopics):
iecommon.logDebug("Creating data fields", logTopics)
dataNode = doc.xpathEval('/equipment-model/data')[0]
@@ -344,38 +345,20 @@ class FESADesignGenerator3_0_0(object):
acquisitionNode = getOrCreateChildElement(deviceDataNode,'acquisition')
self.getOrCreatePLCHostNameField(configurationNode)
self.getOrCreatePLCDeviceLabelField(configurationNode)
- classNode = silecsRoot.xpathEval('//SILECS-Class')[0]
self.getOrCreateParameterFileField(configurationNode)
- # parse the SILECS design document to find the blocks
- for blockNode in silecsRoot.xpathEval("//Block"): # loop over the blocks
- block = DesignBlock(blockNode)
-
- if block.isAcquisition():
- for reg in block.getDesignRegisters():
- fieldNode = self.getOrCreateFieldNode(acquisitionNode,reg)
- if reg.isAcquisition():
- fillAttributes(fieldNode, {'multiplexed': 'false', 'persistent': 'false'})
- elif reg.isVolatile():
- fillAttributes(fieldNode, {'multiplexed': 'false', 'persistent': 'false'})
- self.getOrCreateType(fieldNode,reg)
-
- elif block.isCommand():
- for reg in block.getDesignRegisters():
+
+ for block in designClass.getDesignBlocks():
+ for reg in block.getDesignRegisters():
+ if reg.isSetting():
fieldNode = self.getOrCreateFieldNode(settingNode,reg)
- if reg.isSetting():
- fillAttributes(fieldNode, {'multiplexed': 'false', 'persistent': 'true', 'shared': 'true'})
- elif reg.isVolatile():
- fillAttributes(fieldNode, {'multiplexed': 'false', 'persistent': 'false', 'shared': 'true'})
- self.getOrCreateType(fieldNode,reg)
-
- else: # Setting Block
- for reg in block.getDesignRegisters():
+ fillAttributes(fieldNode, {'multiplexed': 'false', 'persistent': 'true'})
+ elif reg.isAcquisition():
+ fieldNode = self.getOrCreateFieldNode(acquisitionNode,reg)
+ fillAttributes(fieldNode, {'multiplexed': 'false', 'persistent': 'false'})
+ else: #volatile#
fieldNode = self.getOrCreateFieldNode(settingNode,reg)
- if reg.isVolatile():
- fillAttributes(fieldNode, {'multiplexed': 'false', 'persistent': 'false'})
- else: #synchro SLAVE and MASTER
- fillAttributes(fieldNode, {'multiplexed': 'false', 'persistent': 'true'})
- self.getOrCreateType(fieldNode,reg)
+ fillAttributes(fieldNode, {'multiplexed': 'false', 'persistent': 'false'})
+ self.getOrCreateType(fieldNode,reg)
globalDataNode = getOrCreateChildElement(dataNode,'global-data')
globalConfigurationNode = ""
@@ -386,13 +369,13 @@ class FESADesignGenerator3_0_0(object):
globalConfigurationNode = getOrCreatePreviousSiblingElement(getFirstChild(globalDataNode),'configuration')
else:
globalConfigurationNode = globalDataNode.xpathEval("configuration")[0]
- self.getOrCreatePLCClassVersionField(globalConfigurationNode,classNode.prop('version'))
+ self.getOrCreatePLCClassVersionField(globalConfigurationNode,designClass.version)
#-------------------------------------------------------------------------
# Generates the interface/device-interface node of the
# FESA design document parsing the SILECS class document
#-------------------------------------------------------------------------
- def genDeviceInterface(self,silecsRoot, doc,logTopics):
+ def genDeviceInterface(self,designClass, doc,logTopics):
# parse the FESA design document to find the device-interface node and create children
interfaceNode = doc.xpathEval('/equipment-model/interface')[0]
globalInterfaceNode = getOrCreateChildElement(interfaceNode,'global-interface')
@@ -400,25 +383,24 @@ class FESADesignGenerator3_0_0(object):
settingNode = getOrCreateChildElement(deviceInterfaceNode,'setting')
acquisitionNode = getOrCreateChildElement(deviceInterfaceNode,'acquisition')
actionsNode = doc.xpathEval('/equipment-model/actions')[0]
- for blockNode in silecsRoot.xpathEval("//Block"):
- block = DesignBlock(blockNode)
+ for block in designClass.getDesignBlocks():
if not block.generateFesaProperty:
continue #skip this block
- if block.mode == ('READ-ONLY'):
+ if block.isAcquisition():
self.getOrCreateFESAProperty(acquisitionNode,actionsNode,block)
rtAction = getOrCreateNamedChildElement(actionsNode,'rt-action','Recv'+ block.getFesaName())
notifiedProperty = getOrCreateNamedChildElement(rtAction,'notified-property', block.getFesaName(),'property-name-ref')
fillAttributes(notifiedProperty, {'automatic': 'true'})
self.genEvent(block,doc,logTopics)
self.genSchedulingUnit(block,doc,logTopics)
- else: # setting property for both WO and RW blocks, w/get+set server action
+ else: # Setting or Command
settingPropertyNode = self.getOrCreateFESAProperty(settingNode, actionsNode, block)
fillAttributes(settingPropertyNode, {'visibility': 'development', 'multiplexed': 'false'})
self.getOrCreateAction(settingPropertyNode,'Send'+block.getFesaName(),'set',actionsNode,'custom')
- if block.mode == 'READ-WRITE':
+ if block.isSetting():
self.getOrCreateAction(settingPropertyNode,'Recv'+block.getFesaName(),'get',actionsNode,'custom')
- else: # WRITE-ONLY
+ else: # Command
self.getOrCreateAction(settingPropertyNode,'Get'+block.getFesaName(),'get',actionsNode,'default')
#-------------------------------------------------------------------------
@@ -488,12 +470,12 @@ class FESADesignGenerator3_0_0(object):
owner = silecsRoot.xpathEval('//Information/Owner')[0]
creatorNode.setProp('login', owner.prop('user-login')) # == Owner in SILECS design document
-
+ designClass = DesignClass.getDesignClassFromRootNode(silecsRoot)
# Generate data fields
- self.genData(silecsRoot, fesaRoot,logTopics)
+ self.genData(designClass, fesaRoot,logTopics)
# Generate properties, Actions, Events, Scheduling Units
- self.genDeviceInterface(silecsRoot, fesaRoot,logTopics)
+ self.genDeviceInterface(designClass, fesaRoot,logTopics)
self.addDesignFileId(fesaRoot,logTopics)
return fesaRoot
diff --git a/silecs-codegen/src/xml/fesa/fesa_3_0_0/generateSourceCode.py b/silecs-codegen/src/xml/fesa/fesa_3_0_0/generateSourceCode.py
index f92e9cba09b132cfebe1b5f0d848dbf6bf36cb56..e3de017449a3b226d201fc2edaa0373816f52425 100644
--- a/silecs-codegen/src/xml/fesa/fesa_3_0_0/generateSourceCode.py
+++ b/silecs-codegen/src/xml/fesa/fesa_3_0_0/generateSourceCode.py
@@ -32,6 +32,7 @@ from iecommon import *
from fesaGeneral import *
from model.Register import DesignRegister
from model.Block import DesignBlock
+from model.Class import DesignClass
import libxml2
def findBlockServerSetActionName(fesaRoot, blockName):
@@ -46,18 +47,17 @@ def findBlockServerSetActionName(fesaRoot, blockName):
# of the FESA server
#-------------------------------------------------------------------------
def genHSource(className, silecsRoot, fesaRoot, sourcePath,logTopics):
+ designClass = DesignClass.getDesignClassFromRootNode(silecsRoot)
source = fesaTemplates.genHTop(className)
- for blockNode in silecsRoot.xpathEval('//Block'):
- block = DesignBlock(blockNode)
+ for block in designClass.getDesignBlocks():
if block.isWritable():
serverActionName = findBlockServerSetActionName(fesaRoot,block.getFesaName())
source += fesaTemplates.genHTopBlock(className, serverActionName)
source += fesaTemplates.genHTop2(className)
- for blockNode in silecsRoot.xpathEval('//Block'):
- block = DesignBlock(blockNode)
+ for block in designClass.getDesignBlocks():
if block.isAcquisition():
source += fesaTemplates.genHBlock('RO', block.name,block.getFesaName() )
elif block.isCommand():
@@ -67,8 +67,7 @@ def genHSource(className, silecsRoot, fesaRoot, sourcePath,logTopics):
source += fesaTemplates.genHBottom(className)
- for blockNode in silecsRoot.xpathEval('//Block'):
- block = DesignBlock(blockNode)
+ for block in designClass.getDesignBlocks():
source += fesaTemplates.genHDeclBlocks(block.name)
source += fesaTemplates.genHClosing(className)
@@ -94,40 +93,34 @@ def genHSource(className, silecsRoot, fesaRoot, sourcePath,logTopics):
#-------------------------------------------------------------------------
def genCppSource(className, silecsRoot, fesaRoot, sourcePath,logTopics):
+ designClass = DesignClass.getDesignClassFromRootNode(silecsRoot)
finalSource = fesaTemplates.genCTop(className)
- blockList = silecsRoot.xpathEval('//Block')
- for blockNode in blockList:
- block = DesignBlock(blockNode)
+ blockList = designClass.getDesignBlocks()
+ for block in blockList:
finalSource += fesaTemplates.genCGlobal(className, block.name)
finalSource += fesaTemplates.genCPart1(className)
- for blockNode in blockList:
- block = DesignBlock(blockNode)
+ for block in blockList:
finalSource += fesaTemplates.genCBlockConstr(block.name, className)
finalSource += fesaTemplates.genCPart2(className)
- for blockNode in blockList:
- block = DesignBlock(blockNode)
+ for block in blockList:
if (block.isWritable()):
- # just set the fields if block is WO or RW and register synchronisation is SLAVE
# WARNING: In order to have multiplexed FESA fields, the corresponding SILECS registers' synchro mode must be 'NONE'
finalSource += fesaTemplates.genCSetPLC(className, block.name)
finalSource += fesaTemplates.genCPart3(className)
- for blockNode in blockList:
- block = DesignBlock(blockNode)
+ for block in blockList:
if (block.isReadable()):
- # just get the fields if block is RO or RW and register synchronisation is MASTER
# WARNING: In order to have multiplexed FESA fields, the corresponding SILECS registers' synchro mode must be 'NONE'
finalSource += fesaTemplates.genCGetPLC(className, block.name)
finalSource += fesaTemplates.genCPart4(className)
- for blockNode in blockList:
- block = DesignBlock(blockNode)
+ for block in blockList:
if block.isReadable():
finalSource += fesaTemplates.genCCommonGet(block.name,className)
finalSource += '\n'
diff --git a/silecs-codegen/src/xml/genduwrapper.py b/silecs-codegen/src/xml/genduwrapper.py
index 8351988e961a7947cac80f4bcb973e0cbdcba018..dc8036b1ab3c6e3576cc1161d219eee4e365666c 100644
--- a/silecs-codegen/src/xml/genduwrapper.py
+++ b/silecs-codegen/src/xml/genduwrapper.py
@@ -26,20 +26,20 @@ import genduwrappertemplate
from iecommon import *
from model.Register import DesignRegister
from model.Block import DesignBlock
+from model.Class import DesignClass
def genClassHeader(workspacePath, deployName, classNode, funcGetSilecsDesignFilePath, funcGetDuDesignWrapperFile, logTopics):
designName = classNode.prop("silecs-design-name")
designVersion = classNode.prop("silecs-design-version")
designFile = funcGetSilecsDesignFilePath(workspacePath, designName)
designDOM = libxml2.parseFile(designFile)
+ designClass = DesignClass.getDesignClassFromRootNode(designDOM)
if(not os.path.isfile(designFile)):
raise Exception("File not found: " + designFile)
- blockList = designDOM.xpathEval("//Block")
- classDeclarations = ""
+ classDeclarations = ""
#construct Block class
- for blockNode in blockList:
- block = DesignBlock(blockNode)
+ for block in designClass.getDesignBlocks():
registerInitializerList = genduwrappertemplate.getBlockInitializerList(block)
registerGetterSetter = genduwrappertemplate.getRegisterGetterSetter(block)
registersDimentionsDeclaration = genduwrappertemplate.getRegistersDimetionsDeclaration(block)
@@ -47,14 +47,13 @@ def genClassHeader(workspacePath, deployName, classNode, funcGetSilecsDesignFile
classDeclarations += genduwrappertemplate.getBlockClass(block,registerInitializerList,registerGetterSetter,registersDimentionsDeclaration,registersDeclaration)
blockGetters = ""
- sendRecvBlocks = genduwrappertemplate.getDeviceSendRecvBlocks(blockList)
- for blockNode in blockList:
- block = DesignBlock(blockNode)
+ sendRecvBlocks = genduwrappertemplate.getDeviceSendRecvBlocks(designClass.getBlockNodes())
+ for block in designClass.getDesignBlocks():
blockGetters += genduwrappertemplate.getDeviceBlockGetterSetter(block)
classDeclarations += genduwrappertemplate.getDeviceClass(blockGetters,sendRecvBlocks)
- sendRecvBlocks = genduwrappertemplate.getControllerSendRecvBlocks(blockList)
+ sendRecvBlocks = genduwrappertemplate.getControllerSendRecvBlocks(designClass.getBlockNodes())
classDeclarations = genduwrappertemplate.getDesignClass(designName, designVersion)
designWrapper = genduwrappertemplate.designFileTemplate.substitute({'designNameCapitalized' : iecommon.capitalizeString(designName),'designNameUpper' : designName.upper(),'classDeclarations' : classDeclarations})
@@ -66,7 +65,6 @@ def genClassHeader(workspacePath, deployName, classNode, funcGetSilecsDesignFile
def genDuWrapperBase(deployFile,funcGetDuWrapperFile,workspacePath,funcGetSilecsDesignFilePath, funcGetDuDesignWrapperFile,deployName,deployVersion,logTopics={'errorlog': True}):
deployDOM = libxml2.parseFile(deployFile)
-
for controllerNode in deployDOM.xpathEval("/SILECS-Deploy/Controller"):
controllerName = controllerNode.prop("host-name")
controllerDomain = "" # GSI-Hack - No Support for domains at GSI
diff --git a/silecs-codegen/src/xml/genparam.py b/silecs-codegen/src/xml/genparam.py
index aab232a52f5351d5cec5dfa8ba327be9c51acff8..4dfecb5eb7f15da12e8d2fe1b79b8c0568ce5b87 100644
--- a/silecs-codegen/src/xml/genparam.py
+++ b/silecs-codegen/src/xml/genparam.py
@@ -30,6 +30,7 @@ import iefiles
from iecommon import *
from model.Register import *
from model.Block import *
+from model.Class import *
#-------------------------------------------------------------------------
# Global definitions
@@ -41,7 +42,7 @@ deviceMemSize = 0 # global memory-size of one class instance (sum of b
nbBlock = 0 # number of block of the class
plcSize = 0
plcLast = 0
-classMem = 0
+classMem = ""
instAddr = 0
blockCounter = 0 # used for NI block address generation
@@ -483,12 +484,10 @@ def computeChecksumController( workspacePath, controllerNode, silecsVersion, PLC
return CRC32
def computeChecksumClass(designDOM, CRC32, logTopics={'errorlog': True}):
- blockList = designDOM.xpathEval("//Block")
- for blockNode in blockList:
- blockName = blockNode.prop('name')
- blockMode = blockNode.prop('mode')
- for registerNode in blockNode.xpathEval("Register"):
- register = DesignRegister(registerNode)
+ designClass = DesignClass.getDesignClassFromRootNode(designDOM)
+ for block in designClass.getDesignBlocks():
+ CRC32 = zlib.crc32(trim(block.name),CRC32)& 0xffffffff
+ for register in block.getDesignRegisters():
CRC32 = zlib.crc32(trim(register.name),CRC32)& 0xffffffff
CRC32 = zlib.crc32(trim(register.format),CRC32)& 0xffffffff
CRC32 = zlib.crc32(trim(str(register.dim1)),CRC32)& 0xffffffff
@@ -791,23 +790,23 @@ def genParamBase( funcGetSilecsDesignFilePath, funcGetParameterFile, funcGetSile
outputRoot.addChild(paramSilecsMappingNode)
classNodes = controllerNode.xpathEval('SilecsDesign')
+
for classNode in classNodes:
iecommon.logDebug("-----------------------------------------",logTopics)
iecommon.logDebug("------ Analysing Class %s ------"%classNode.prop("silecs-design-name"),logTopics)
iecommon.logDebug("-----------------------------------------",logTopics)
designDOM = loadSilecsDesignDOM(workspacePath, classNode, silecsVersion, funcGetSilecsDesignFilePath)
-
+ designClass = DesignClass.getDesignClassFromRootNode(designDOM)
+ paramClass = ParamClass()
+ paramClass.initWithDesignClass(designClass)
+ paramSilecsMappingNode.addChild(paramClass.xmlNode)
+
# Extract the number of devices ------------------------------------------
-
deviceLabelList=classNode.xpathEval('Device')
nbDevice = len(deviceLabelList)
iecommon.logDebug("Class %s uses device-list and has %s devices" %(classNode,nbDevice),logTopics)
-
- paramClassNode = libxml2.newNode("SILECS-Class")
- paramSilecsMappingNode.addChild(paramClassNode)
- paramClassNode.setProp("name", classNode.prop("silecs-design-name"))
- paramClassNode.setProp("version", classNode.prop("silecs-design-version"))
+
#-------------------------------------------------------------------------
# Generate section <Block></Block>
@@ -821,8 +820,7 @@ def genParamBase( funcGetSilecsDesignFilePath, funcGetParameterFile, funcGetSile
computeBlkAddress = whichBlkAddressFunction[plcBrand + plcProtocol]
# INNER LOOP TO ACCESS AT BLOCK LEVEL (LOOP-2)
- for blockNode in designDOM.xpathEval("//Block"): #LOOP-2
- designBlock = DesignBlock(blockNode)
+ for designBlock in designClass.getDesignBlocks(): #LOOP-2
paramBlock = ParamBlock()
paramBlock.initWithDesignBlock(designBlock)
@@ -861,7 +859,7 @@ def genParamBase( funcGetSilecsDesignFilePath, funcGetParameterFile, funcGetSile
# Compute address for the next register
regAddress = computeAnyNextRegAddress(plcBrand, regAddress, designRegister.dim1, designRegister.dim2)
paramBlock.xmlNode.addChild(paramRegister.xmlNode)
- paramRegister.xmlNode.shellPrintNode()
+ #paramRegister.xmlNode.shellPrintNode()
#iterativelly compute the block size (accumulator initialized outside the loop)
blockSize = blockSize + (int(regSize) * designRegister.dim1 * designRegister.dim2)
# END OF INNER LOOP TO ACCESS AT REGISTER LEVEL (LOOP-3)
@@ -870,7 +868,7 @@ def genParamBase( funcGetSilecsDesignFilePath, funcGetParameterFile, funcGetSile
paramBlock.setAddress(computeBlkAddress(regAddress, int(classBaseAddress),nbDevice))
paramBlock.setMemSize(blkMemSize)
# Append block
- paramClassNode.addChild(paramBlock.xmlNode)
+ paramClass.xmlNode.addChild(paramBlock.xmlNode)
# Count the number of devices
nbBlock = nbBlock+1
# Accumulate blkMemSize to compute the total deviceMemSize
@@ -878,25 +876,21 @@ def genParamBase( funcGetSilecsDesignFilePath, funcGetParameterFile, funcGetSile
# END OF INNER LOOP TO ACCESS AT BLOCK LEVEL (LOOP-2)
# Set block Address
- paramClassNode.setProp("address", str(classBaseAddress))
+ paramClass.setAddress(classBaseAddress)
- #-------------------------------------------------------------------------
- # Devices
- #-------------------------------------------------------------------------
computeInstAddress = whichInstAddressFunction[ plcBrand + plcProtocol ]
-
for device in deviceLabelList:
- element3 = libxml2.newNode("Instance")
- element3.setProp("label", device.prop("device-name"))
- element3.setProp("address", str(computeInstAddress(classBaseAddress, deviceMemSize)))
- paramClassNode.addChild(element3)
+ instance = libxml2.newNode("Instance")
+ instance.setProp("label", device.prop("device-name"))
+ instance.setProp("address", str(computeInstAddress(classBaseAddress, deviceMemSize)))
+ paramClass.xmlNode.addChild(instance)
# Compute the memory address for the next class
computeBaseAddress = whichBaseAddressFunction [plcBrand+plcProtocol]
classBaseAddress = computeBaseAddress(classBaseAddress, nbBlock, nbDevice, deviceMemSize);
# Set class used-memory
- paramClassNode.setProp("used-mem", str(classMem))
+ paramClass.setUsedMemory(classMem)
iecommon.logInfo("Used-memory for Class "+classNode.prop("silecs-design-version")+": "+str(classMem),logTopics)
#------------------------------------------------------
diff --git a/silecs-codegen/src/xml/genplcsrc.py b/silecs-codegen/src/xml/genplcsrc.py
index f3c98a1824004ddeef9a2b17a41dd9cdc3d20195..005156fb7a8237b33720e9117d8095e02f285427 100644
--- a/silecs-codegen/src/xml/genplcsrc.py
+++ b/silecs-codegen/src/xml/genplcsrc.py
@@ -30,6 +30,8 @@ import rabbitTemplate
from iecommon import *
from model.Register import ParamRegister
from model.Block import ParamBlock
+from model.Class import ParamClass
+
#=========================================================================
# General remarks
#=========================================================================
@@ -148,26 +150,18 @@ def generateSiemensSources(paramDOM, sourceFolderPath ,logTopics):
UDTnumber = long(deploy.address) #use base data-block address for UDT number as well (to be reserved by the developer)
# Generate sources for each class that is deployed in the PLC
- classNodes = paramDOM.xpathEval("/SILECS-Param/SILECS-Mapping/SILECS-Class")
- for classNode in classNodes:
- blockDOMList = classNode.xpathEval("Block") # get Blocks elements of that class
- deviceDOMList = classNode.xpathEval("Instance") # get Device instances of that class
-
- className = classNode.prop('name')
- classVersion = classNode.prop('version')
-
+ for paramClass in ParamClass.getParamClassesFromRootNode(paramDOM):
+ deviceDOMList = paramClass.getDeviceInstanceNodes() # get Device instances of that class
deviceNumber = len(deviceDOMList)
# Generate the Blocks definition
- for blockIndex, blockDOM in enumerate(blockDOMList):
+ for blockIndex, block in enumerate(paramClass.getParamBlocks()):
registerList = ''
- block = ParamBlock()
- block.initWithParamBlockNode(blockDOM)
for register in block.getParamRegisters():
# If PLC does not supports this register format abort this generation and log the error
if(register.format in ['uint64','int64','float64']):
iecommon.logError('ERROR: In design %s_%s register %s, %s format not supported for current controller model.'
- %(className, classVersion, register.name, register.format)
+ %(paramClass.name, paramClass.version, register.name, register.format)
, True,logTopics)
#create register value if required (diagnostic registers assignment in particular)
@@ -178,36 +172,31 @@ def generateSiemensSources(paramDOM, sourceFolderPath ,logTopics):
else:
registerList += s7template.stlRegister(register.name, register.format, register.dim1, register.dim2, registerValue)
- stlString += s7template.stlBlockUDT(deploy.owner, className, classVersion, block.name, registerList, (blockIndex == 0))
- symString += s7template.symBlockUDT(className, classVersion, block.name, UDTnumber, (blockIndex == 0))
+ stlString += s7template.stlBlockUDT(deploy.owner, paramClass.name, paramClass.version, block.name, registerList, (blockIndex == 0))
+ symString += s7template.symBlockUDT(paramClass.name, paramClass.version, block.name, UDTnumber, (blockIndex == 0))
UDTnumber += 1
if deploy.plcProtocol == 'DEVICE_MODE':
# Generate the Data-Blocks: one DB per Device instance
for deviceIndex, deviceDOM in enumerate(deviceDOMList):
blockList = ''
- for blockDOM in blockDOMList:
- block = ParamBlock()
- block.initWithParamBlockNode(blockDOM)
- blockList += s7template.stlBlock(className, block.name)
+ for block in paramClass.getParamBlocks():
+ blockList += s7template.stlBlock(paramClass.name, block.name)
deviceLabel = deviceDOM.prop('label')
- stlString += s7template.generateBlock(deploy.owner, className, classVersion, deploy.plcSystem, DBnumber, deviceLabel, blockList, (deviceIndex == 0),deploy.plcProtocol)
- symString += s7template.symDeviceDB(className, classVersion, deviceLabel, DBnumber, (deviceIndex == 0))
+ stlString += s7template.generateBlock(deploy.owner, paramClass.name, paramClass.version, deploy.plcSystem, DBnumber, deviceLabel, blockList, (deviceIndex == 0),deploy.plcProtocol)
+ symString += s7template.symDeviceDB(paramClass.name, paramClass.version, deviceLabel, DBnumber, (deviceIndex == 0))
DBnumber += 1
else: # BLOCK_MODE
# Generate the Data-Blocks: one DB per Block of registers
- for blockIndex, blockDOM in enumerate(blockDOMList):
- block = ParamBlock()
- block.initWithParamBlockNode(blockDOM)
-
+ for blockIndex, block in enumerate(paramClass.getParamBlocks()):
deviceList = ''
for deviceDOM in deviceDOMList:
deviceLabel = deviceDOM.prop('label')
- deviceList += s7template.stlDevice(deviceLabel, className, block.name)
+ deviceList += s7template.stlDevice(deviceLabel, paramClass.name, block.name)
- stlString += s7template.generateBlock(deploy.owner, className, classVersion, deploy.plcSystem, DBnumber, block.name, deviceList, (blockIndex == 0),deploy.plcProtocol)
- symString += s7template.symBlockDB(className, classVersion, block.name, DBnumber, (blockIndex == 0))
+ stlString += s7template.generateBlock(deploy.owner, paramClass.name, paramClass.version, deploy.plcSystem, DBnumber, block.name, deviceList, (blockIndex == 0),deploy.plcProtocol)
+ symString += s7template.symBlockDB(paramClass.name, paramClass.version, block.name, DBnumber, (blockIndex == 0))
DBnumber += 1
# write the String PLC generated code
@@ -221,9 +210,8 @@ def generateSiemensSources(paramDOM, sourceFolderPath ,logTopics):
#-------------------------------------------------------------------------
# ----------------------------------------------------
-def generateSchneiderRegisters(xsydoc, classDOM, deviceDOM, block, deviceIndex, modeDevice, deploy, logTopics):
+def generateSchneiderRegisters(xsydoc, paramClass, deviceDOM, block, deviceIndex, modeDevice, deploy, logTopics):
- className = classDOM.prop('name')
deviceLabel = deviceDOM.prop('label')
#Device and Block adresses come from the generated Paramerers file. Depends on the protocol mode:
@@ -247,7 +235,7 @@ def generateSchneiderRegisters(xsydoc, classDOM, deviceDOM, block, deviceIndex,
dataElt = xsydoc.xpathEval("//dataBlock")[0] #only one dataBlock node has been inserted so far
regElt = libxml2.newNode('variables')
# Compute the base checksum of the class name
- classNameCRC = zlib.crc32(className,0) & 0xffff
+ classNameCRC = zlib.crc32(paramClass.name,0) & 0xffff
# Create register name = regname_crc32(classname)_deviceid
# 24 char (register name) + 1 (underscore) + 4 char (CRC classname) + 1 (underscore) + n (device id) = 30 + n (device id)
# possible problem when device id (n)> 99 --> string > 32 not compatible with Schneider PLCs
@@ -268,7 +256,7 @@ def generateSchneiderRegisters(xsydoc, classDOM, deviceDOM, block, deviceIndex,
if register.name == '_date' : initElt.setProp("value", getDateTime())
regElt.addChild(initElt)
commElt = libxml2.newNode('comment')
- commElt.setContent(className+"/"+deviceLabel+"/"+block.name)
+ commElt.setContent(paramClass.name+"/"+deviceLabel+"/"+block.name)
regElt.addChild(commElt)
dataElt.addChild(regElt)
@@ -286,20 +274,16 @@ def generateSchneiderSources(paramDOM,sourceFolderPath,logTopics):
xsyDoc.addChild(rootElt)
dataElt = libxml2.newNode('dataBlock')
rootElt.addChild(dataElt)
-
- classNodes = paramDOM.xpathEval("/SILECS-Param/SILECS-Mapping/SILECS-Class")
- for classNode in classNodes:
- address = int(classNode.prop('address')) #address of the first register of the configuration
- deviceDOMList = classNode.xpathEval("Instance") # get Device instances of that class
+
+ for paramClass in ParamClass.getParamClassesFromRootNode(paramDOM):
+ deviceDOMList = paramClass.getDeviceInstanceNodes() # get Device instances of that class
- for blockDOM in classNode.xpathEval("Block"):
- block = ParamBlock()
- block.initWithParamBlockNode(blockDOM)
+ for block in paramClass.getParamBlocks():
for deviceIndex,deviceDOM in enumerate(deviceDOMList):
if deploy.plcProtocol == 'DEVICE_MODE': #-------------------
- generateSchneiderRegisters(xsyDoc, classNode, deviceDOM, block, deviceIndex, True, deploy, logTopics)
+ generateSchneiderRegisters(xsyDoc, paramClass, deviceDOM, block, deviceIndex, True, deploy, logTopics)
else:
- generateSchneiderRegisters(xsyDoc, classNode, deviceDOM, block, deviceIndex, False, deploy, logTopics)
+ generateSchneiderRegisters(xsyDoc, paramClass, deviceDOM, block, deviceIndex, False, deploy, logTopics)
# Finally, write the DOM object (PLC generated code) into the XSY source file
generateControllerFiles(sourceFolderPath,deploy,".xsy",rootElt.serialize(format = True),logTopics);
@@ -321,21 +305,13 @@ def generateRabbitSources(paramDOM,sourceFolderPath,logTopics):
classList = ''
NBdeviceDefinitionList = ''
- classNodes = paramDOM.xpathEval("/SILECS-Param/SILECS-Mapping/SILECS-Class")
- for classNode in classNodes:
- blockDOMList = classNode.xpathEval("Block") # get Blocks elements of that class
- deviceDOMList = classNode.xpathEval("Instance") # get Device instances of that class
-
- className = classNode.prop('name')
- classVersion = classNode.prop('version')
-
+ for paramClass in ParamClass.getParamClassesFromRootNode(paramDOM):
+ deviceDOMList = paramClass.getDeviceInstanceNodes() # get Device instances of that class
deviceNumber = len(deviceDOMList)
#==== Generate the Blocks definition ====
- for blockIndex, blockDOM in enumerate(classNode.xpathEval("Block")):
+ for blockIndex, block in enumerate(paramClass.getParamBlocks()):
registerList = ''
- block = ParamBlock()
- block.initWithParamBlockNode(blockDOM)
for register in block.getParamRegisters():
# If PLC does not supports this register format abort this generation and log the error
if(register.format in ['float64']):
@@ -346,20 +322,18 @@ def generateRabbitSources(paramDOM,sourceFolderPath,logTopics):
else:
registerList += rabbitTemplate.cRegister(register.name, register.format, register.dim1, register.dim2)
- cTypeDefinitions += rabbitTemplate.cBlockUDT(className, classVersion, block.name, registerList, (blockIndex == 0))
+ cTypeDefinitions += rabbitTemplate.cBlockUDT(paramClass.name, paramClass.version, block.name, registerList, (blockIndex == 0))
#==== Memory allocation ====
if deploy.plcProtocol == 'DEVICE_MODE':
# Generate the List of block in the class
blockList =''
- for blockIndex, blockDOM in enumerate(blockDOMList):
- block = ParamBlock()
- block.initWithParamBlockNode(blockDOM)
- blockList += rabbitTemplate.cDeviceModeBlockInstantiation(className, block.name)
+ for block in paramClass.getParamBlocks():
+ blockList += rabbitTemplate.cDeviceModeBlockInstantiation(paramClass.name, block.name)
deviceList = ''
for deviceDOM in deviceDOMList:
- deviceLabel = className + "_" + deviceDOM.prop('label')
+ deviceLabel = paramClass.name + "_" + deviceDOM.prop('label')
deviceList += deviceLabel + ', ';
deviceList = deviceList[:-2] # remove last comma space
classList += rabbitTemplate.cDeviceModeClass_deviceList(blockList, deviceList)
@@ -367,16 +341,13 @@ def generateRabbitSources(paramDOM,sourceFolderPath,logTopics):
else: # BLOCK_MODE
# Generate the List of block in the class
- for blockIndex, blockDOM in enumerate(blockDOMList):
- block = ParamBlock()
- block.initWithParamBlockNode(blockDOM)
-
+ for block in paramClass.getParamBlocks():
deviceList = ''
for deviceDOM in deviceDOMList:
deviceLabel = deviceDOM.prop('label')
- deviceList +=rabbitTemplate.cBlockModeDeviceInstantiation_deviceList(className, block.name, deviceLabel)
+ deviceList +=rabbitTemplate.cBlockModeDeviceInstantiation_deviceList(paramClass.name, block.name, deviceLabel)
- blockList += rabbitTemplate.cBlockModeBlockInstantiation(deviceList, className, block.name)
+ blockList += rabbitTemplate.cBlockModeBlockInstantiation(deviceList, paramClass.name, block.name)
# Predefine number of devices constant
cDataAllocation += NBdeviceDefinitionList
@@ -399,7 +370,7 @@ def generateRabbitSources(paramDOM,sourceFolderPath,logTopics):
cCodeString += cInitFunction
# Generate and append sample example
- cCodeString += rabbitTemplate.cExample(deploy.plcProtocol,True,className, block.name, register.name, deviceLabel)
+ cCodeString += rabbitTemplate.cExample(deploy.plcProtocol,True,paramClass.name, block.name, register.name, deviceLabel)
# Finally, write the String C generated code into the temporal output file
generateControllerFiles(sourceFolderPath,deploy,".h",cCodeString,logTopics);
@@ -418,10 +389,8 @@ def generateVirtualS7Sources(paramDOM,sourceFolderPath,logTopics):
protocolMode = 'DeviceMode';
duConstructor = virtualS7Template.vs7DuConstructor(deploy.plcName, protocolMode, deploy.address)
- classNodes = paramDOM.xpathEval("/SILECS-Param/SILECS-Mapping/SILECS-Class")
-
# Generate sources for each class that is deployed in the PLC
- for classNode in classNodes:
+ for paramClass in ParamClass.getParamClassesFromRootNode(paramDOM):
blocksCodeString = ''
@@ -433,19 +402,16 @@ def generateVirtualS7Sources(paramDOM,sourceFolderPath,logTopics):
deleteDeviceCodeString = ''
designCodeString = ''
- deviceDOMList = classNode.xpathEval("Instance") # get Device instances of that class
-
- className = classNode.prop('name')
- classVersion = classNode.prop('version')
+ deviceDOMList = paramClass.getDeviceInstanceNodes() # get Device instances of that class
#DEPLOY-UNIT code generation ============================
- includeDesign += virtualS7Template.vs7DuDesignInclude(className, classVersion)
- allocDesign += virtualS7Template.vs7DuDesignAlloc(className, classVersion)
- deleteDesign += virtualS7Template.vs7DuDesignDelete(className)
- getDesign += virtualS7Template.vs7DuDesignGet(className, classVersion)
+ includeDesign += virtualS7Template.vs7DuDesignInclude(paramClass.name, paramClass.version)
+ allocDesign += virtualS7Template.vs7DuDesignAlloc(paramClass.name, paramClass.version)
+ deleteDesign += virtualS7Template.vs7DuDesignDelete(paramClass.name)
+ getDesign += virtualS7Template.vs7DuDesignGet(paramClass.name, paramClass.version)
#CLASSES code generation ================================
- for blockIndex, blockDOM in enumerate(classNode.xpathEval("Block")):
+ for block in paramClass.getParamBlocks():
getSetCodeString = ''
dimsCodeString = ''
dataCodeString = ''
@@ -453,12 +419,9 @@ def generateVirtualS7Sources(paramDOM,sourceFolderPath,logTopics):
currentRegisterAddress = 0 #used to compute even/odd adress and insert align data by adding dummy registers
previousRegisterMemSize = 0 #...
dummyIndex = 0;
-
- block = ParamBlock()
- block.initWithParamBlockNode(blockDOM)
- createBlockCodeString += virtualS7Template.vs7ClassCreateBlock(className, block.name)
- deleteBlockCodeString += virtualS7Template.vs7ClassDeleteBlock(className, block.name)
+ createBlockCodeString += virtualS7Template.vs7ClassCreateBlock(paramClass.name, block.name)
+ deleteBlockCodeString += virtualS7Template.vs7ClassDeleteBlock(paramClass.name, block.name)
for register in block.getParamRegisters():
getSetCodeString += virtualS7Template.vs7ClassGetSet(register.name, register.format, register.dim1, register.dim2,register.stringLength)
@@ -475,20 +438,20 @@ def generateVirtualS7Sources(paramDOM,sourceFolderPath,logTopics):
dataCodeString += virtualS7Template.vs7ClassDataRegister(register.name, register.format, register.dim1, register.dim2, register.stringLength)
previousRegisterMemSize = register.memSize
- blocksCodeString += virtualS7Template.vs7ClassBlock(deploy.silecsVersion, deploy.owner, deploy.checksum, className, block.name, getSetCodeString, block.address, dimsCodeString, dataCodeString)
+ blocksCodeString += virtualS7Template.vs7ClassBlock(deploy.silecsVersion, deploy.owner, deploy.checksum, paramClass.name, block.name, getSetCodeString, block.address, dimsCodeString, dataCodeString)
for deviceIndex, deviceDOM in enumerate(deviceDOMList):
deviceLabel = deviceDOM.prop('label')
- createDeviceCodeString += virtualS7Template.vs7ClassCreateDevice(className, deviceLabel, deviceIndex)
- deleteDeviceCodeString += virtualS7Template.vs7ClassDeleteDevice(className, deviceLabel)
+ createDeviceCodeString += virtualS7Template.vs7ClassCreateDevice(paramClass.name, deviceLabel, deviceIndex)
+ deleteDeviceCodeString += virtualS7Template.vs7ClassDeleteDevice(paramClass.name, deviceLabel)
deviceCodeString = virtualS7Template.vs7ClassDevice(createBlockCodeString, deleteBlockCodeString)
- designCodeString = virtualS7Template.vs7ClassDesign(className, classVersion, createDeviceCodeString, deleteDeviceCodeString)
+ designCodeString = virtualS7Template.vs7ClassDesign(paramClass.name, paramClass.version, createDeviceCodeString, deleteDeviceCodeString)
- classCodeString = virtualS7Template.vs7ClassHeader(className, classVersion, blocksCodeString, deviceCodeString, designCodeString)
+ classCodeString = virtualS7Template.vs7ClassHeader(paramClass.name, paramClass.version, blocksCodeString, deviceCodeString, designCodeString)
# write the CLASS generated code into the temporal output file
- generateControllerFiles(sourceFolderPath,deploy, "." + className + ".h",classCodeString,logTopics);
+ generateControllerFiles(sourceFolderPath,deploy, "." + paramClass.name + ".h",classCodeString,logTopics);
# Prepare the source (<.h> file) with its diagnostic data-block header
duCodeString = virtualS7Template.vs7DuHeader(deploy.plcName, duConstructor, includeDesign, allocDesign, deleteDesign, getDesign)
@@ -503,9 +466,8 @@ def generateVirtualS7Sources(paramDOM,sourceFolderPath,logTopics):
generateControllerFiles(sourceFolderPath,deploy,".cpp",mainCodeString,logTopics);
# ----------------------------------------------------
-def generateBeckhoffRegisters(classDOM, deviceDOM, block, deviceIndex, deploy, logTopics):
+def generateBeckhoffRegisters(paramClass, deviceDOM, block, deviceIndex, deploy, logTopics):
source = ''
- className = classDOM.prop('name')
deviceLabel = deviceDOM.prop('label')
#Device and Block adresses come from the generated Paramerers file. Depends on the protocol mode:
@@ -519,7 +481,7 @@ def generateBeckhoffRegisters(classDOM, deviceDOM, block, deviceIndex, deploy, l
iecommon.logError('ERROR: In register '+register.name+', '+register.format+' format not supported for current controller model.', True)
return
- iecommon.logDebug("Processing: %s %s %s %s" %(className, deviceLabel, block.name, register.name))
+ iecommon.logDebug("Processing: %s %s %s %s" %(paramClass.name, deviceLabel, block.name, register.name))
# Compute the register address relying on the Class Parameters file data
# Attention! Beckhoff uses WORD addressing while Parameters data are expressed in bytes to be PLC independent
@@ -531,10 +493,10 @@ def generateBeckhoffRegisters(classDOM, deviceDOM, block, deviceIndex, deploy, l
raise "PLC model not supported: " + deploy.plcModel
# add comment to source to identify block
- source += ' (*'+className+'/'+deviceLabel+'/'+block.name+' *)\r\n'
+ source += ' (*'+paramClass.name+'/'+deviceLabel+'/'+block.name+' *)\r\n'
# Compute the base checksum of the class name
- classNameCRC = zlib.crc32(className,0) & 0xffff
+ classNameCRC = zlib.crc32(paramClass.name,0) & 0xffff
if block.name == 'hdrBlk':
if register.name == '_version':
@@ -577,18 +539,13 @@ def generateBeckhoffSources(paramDOM, sourceFolderPath, logTopics):
source += '\r\nVAR_GLOBAL\r\n'
- classNodes = paramDOM.xpathEval("/SILECS-Param/SILECS-Mapping/SILECS-Class")
- for classNode in classNodes:
- address = int(classNode.prop('address')) # address of the first register of the configuration
- blockDOMList = classNode.xpathEval("Block") # get Blocks elements of that class
- deviceDOMList = classNode.xpathEval("Instance") # get Device instances of that class
+ for paramClass in ParamClass.getParamClassesFromRootNode(paramDOM):
+ deviceDOMList = paramClass.getDeviceInstanceNodes() # get Device instances of that class
# Device mode is not supported for Beckhoff PLCs - Only block mode available
- for blockDOM in blockDOMList:
- block = ParamBlock()
- block.initWithParamBlockNode(blockDOM)
+ for block in paramClass.getParamBlocks():
for deviceIndex, deviceDOM in enumerate(deviceDOMList):
- source += generateBeckhoffRegisters(classNode, deviceDOM, block, deviceIndex,deploy,logTopics)
+ source += generateBeckhoffRegisters(paramClass, deviceDOM, block, deviceIndex,deploy,logTopics)
source += 'END_VAR'
diff --git a/silecs-codegen/src/xml/migration/1_0_Xto1_1_0.py b/silecs-codegen/src/xml/migration/1_0_Xto2_0_0.py
similarity index 91%
rename from silecs-codegen/src/xml/migration/1_0_Xto1_1_0.py
rename to silecs-codegen/src/xml/migration/1_0_Xto2_0_0.py
index 5abb3170b7f32e0e95a08ada8e67e80d5fa52234..16d1032552de1ab25e59e82a5e708369d6978bca 100644
--- a/silecs-codegen/src/xml/migration/1_0_Xto1_1_0.py
+++ b/silecs-codegen/src/xml/migration/1_0_Xto2_0_0.py
@@ -18,7 +18,7 @@ import os
import sys
from migrationBase import MigrationBase
-from migration1_0_Xto1_1_0.migrators import *
+from migration1_0_Xto2_0_0.migrators import *
import libxml2
import sys
@@ -31,6 +31,7 @@ class Migration(MigrationBase):
def migrateClass(self, context, projectDir ):
modified = designValueTypeMigrator(context)
+ modified |= designBlockRegisterMigrator(context)
return modified
diff --git a/silecs-codegen/src/xml/migration/migration1_0_Xto1_1_0/testMigration.py b/silecs-codegen/src/xml/migration/migration1_0_Xto1_1_0/testMigration.py
deleted file mode 100644
index bebf4bb6a6a416a234d66a74f9a759ce2e0dc653..0000000000000000000000000000000000000000
--- a/silecs-codegen/src/xml/migration/migration1_0_Xto1_1_0/testMigration.py
+++ /dev/null
@@ -1,70 +0,0 @@
-#!/usr/bin/python
-# Copyright 2016 CERN and GSI
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-
-from test.testBase import *
-
-import libxml2
-#from migration.0_10_0to1_0_0 import *
-from migration.migration1_0_Xto1_1_0.migrators import *
-import inspect #get caller name
-
-SilecsDesignOld = '''<?xml version="1.0" encoding="UTF-8"?>
-<SILECS-Design xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
- silecs-version="0.10.0" created="03/21/16" updated="03/21/16"
- xsi:noNamespaceSchemaLocation="/common/usr/cscofe/silecs/0.10.0/silecs-model/src/xml/DesignSchema.xsd">
- <Information>
- <Owner user-login="schwinn" />
- <Editor user-login="schwinn" />
- </Information>
- <SILECS-Class name="PneuDrive" version="0.1.0" domain="TEST">
- <Block name="Acq" mode="READ-ONLY">
- <Register name="string1" synchro="MASTER" format="string" />
- <Register name="string2" synchro="MASTER" format="string" string-len="65"/>
- <Register name="string1D" synchro="MASTER" format="string" array-dim1="2" />
- <Register name="string2D" synchro="MASTER" format="string" array-dim1="2" array-dim2="4"/>
- <Register name="scalar" synchro="MASTER" format="int8" />
- <Register name="scalar1D" synchro="MASTER" format="int8" array-dim1="2" />
- <Register name="scalar2D" synchro="MASTER" format="int8" array-dim1="2" array-dim2="4"/>
- </Block>
- </SILECS-Class>
-</SILECS-Design>'''
-SilecsDesignOldParsed = libxml2.parseDoc(SilecsDesignOld)
-
-
-def testdesignValueTypeMigrator(context):
- designValueTypeMigrator(context)
- #context.shellPrintNode() #for debug
- scalar = context.xpathEval("//Register[not(@format)]/scalar[@format='int8']")
- array = context.xpathEval("//Register[not(@array-dim1)]/array[@dim='2' and @format='int8']")
- array2D = context.xpathEval("//Register[not(@array-dim2)]/array2D[@dim1='2' and @dim2='4' and @format='int8']")
- string1 = context.xpathEval("//Register/string[@format='string' and @string-length='64']")
- string2 = context.xpathEval("//Register[not(@string-len)]/string[@format='string' and @string-length='65']")
- stringArray = context.xpathEval("//Register/stringArray[@dim='2' and @format='string' and @string-length='64']")
- stringArray2D = context.xpathEval("//Register/stringArray2D[@dim1='2' and @dim2='4' and @format='string' and @string-length='64']")
-
-
- assertEqual(len(scalar),1)
- assertEqual(len(array),1)
- assertEqual(len(array2D),1)
- assertEqual(len(string1),1)
- assertEqual(len(string2),1)
- assertEqual(len(stringArray),1)
- assertEqual(len(stringArray2D),1)
-
-
-def runTests():
- testdesignValueTypeMigrator(SilecsDesignOldParsed)
- # print deployDoc # for debugging
diff --git a/silecs-codegen/src/xml/migration/migration1_0_Xto1_1_0/__init__.py b/silecs-codegen/src/xml/migration/migration1_0_Xto2_0_0/__init__.py
similarity index 100%
rename from silecs-codegen/src/xml/migration/migration1_0_Xto1_1_0/__init__.py
rename to silecs-codegen/src/xml/migration/migration1_0_Xto2_0_0/__init__.py
diff --git a/silecs-codegen/src/xml/migration/migration1_0_Xto1_1_0/migrators.py b/silecs-codegen/src/xml/migration/migration1_0_Xto2_0_0/migrators.py
similarity index 68%
rename from silecs-codegen/src/xml/migration/migration1_0_Xto1_1_0/migrators.py
rename to silecs-codegen/src/xml/migration/migration1_0_Xto2_0_0/migrators.py
index f4d3eb242eb09d1937bd14b2af1942b67186bb64..ca2aa04913210a32542bb6b5f4de74d4116b2162 100644
--- a/silecs-codegen/src/xml/migration/migration1_0_Xto1_1_0/migrators.py
+++ b/silecs-codegen/src/xml/migration/migration1_0_Xto2_0_0/migrators.py
@@ -64,3 +64,28 @@ def designValueTypeMigrator(context):
modified = True
return modified
+def designBlockRegisterMigrator(context):
+ modified = False
+ for blockNode in context.xpathEval("SILECS-Design/SILECS-Class/Block"):
+ for childNode in blockNode.get_children():
+ if childNode.get_name() == 'Register':
+ if blockNode.prop("mode") == 'READ-ONLY':
+ childNode.setName("Acquisition-Register")
+ elif blockNode.prop("mode") == 'WRITE-ONLY':
+ childNode.setName("Setting-Register")
+ else: #READ-WRITE
+ if childNode.prop("synchro") == 'SLAVE':
+ childNode.setName("Setting-Register")
+ else:
+ childNode.setName("Volatile-Register")
+ childNode.unsetProp("synchro")
+
+ if blockNode.prop("mode") == 'READ-ONLY':
+ blockNode.setName("Acquisition-Block")
+ elif blockNode.prop("mode") == 'WRITE-ONLY':
+ blockNode.setName("Command-Block")
+ else: #READ-WRITE
+ blockNode.setName("Setting-Block")
+ blockNode.unsetProp("mode")
+ modified = True
+ return modified
diff --git a/silecs-codegen/src/xml/migration/migration1_0_Xto2_0_0/testMigration.py b/silecs-codegen/src/xml/migration/migration1_0_Xto2_0_0/testMigration.py
new file mode 100644
index 0000000000000000000000000000000000000000..c9b0a8f860fc92358f74335cc98a651b203c4484
--- /dev/null
+++ b/silecs-codegen/src/xml/migration/migration1_0_Xto2_0_0/testMigration.py
@@ -0,0 +1,122 @@
+#!/usr/bin/python
+# Copyright 2016 CERN and GSI
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+from test.testBase import *
+
+import libxml2
+from migration.migration1_0_Xto2_0_0.migrators import *
+import inspect #get caller name
+
+def testdesignValueTypeMigrator():
+
+ SilecsDesignOld = '''<?xml version="1.0" encoding="UTF-8"?>
+ <SILECS-Design xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+ silecs-version="0.10.0" created="03/21/16" updated="03/21/16"
+ xsi:noNamespaceSchemaLocation="/common/usr/cscofe/silecs/0.10.0/silecs-model/src/xml/DesignSchema.xsd">
+ <Information>
+ <Owner user-login="schwinn" />
+ <Editor user-login="schwinn" />
+ </Information>
+ <SILECS-Class name="PneuDrive" version="0.1.0" domain="TEST">
+ <Block name="Acq" mode="READ-ONLY">
+ <Register name="string1" synchro="MASTER" format="string" />
+ <Register name="string2" synchro="MASTER" format="string" string-len="65"/>
+ <Register name="string1D" synchro="MASTER" format="string" array-dim1="2" />
+ <Register name="string2D" synchro="MASTER" format="string" array-dim1="2" array-dim2="4"/>
+ <Register name="scalar" synchro="MASTER" format="int8" />
+ <Register name="scalar1D" synchro="MASTER" format="int8" array-dim1="2" />
+ <Register name="scalar2D" synchro="MASTER" format="int8" array-dim1="2" array-dim2="4"/>
+ </Block>
+ </SILECS-Class>
+ </SILECS-Design>'''
+ context = libxml2.parseDoc(SilecsDesignOld)
+
+ designValueTypeMigrator(context)
+ #context.shellPrintNode() #for debug
+ scalar = context.xpathEval("//Register[not(@format)]/scalar[@format='int8']")
+ array = context.xpathEval("//Register[not(@array-dim1)]/array[@dim='2' and @format='int8']")
+ array2D = context.xpathEval("//Register[not(@array-dim2)]/array2D[@dim1='2' and @dim2='4' and @format='int8']")
+ string1 = context.xpathEval("//Register/string[@format='string' and @string-length='64']")
+ string2 = context.xpathEval("//Register[not(@string-len)]/string[@format='string' and @string-length='65']")
+ stringArray = context.xpathEval("//Register/stringArray[@dim='2' and @format='string' and @string-length='64']")
+ stringArray2D = context.xpathEval("//Register/stringArray2D[@dim1='2' and @dim2='4' and @format='string' and @string-length='64']")
+
+
+ assertEqual(len(scalar),1)
+ assertEqual(len(array),1)
+ assertEqual(len(array2D),1)
+ assertEqual(len(string1),1)
+ assertEqual(len(string2),1)
+ assertEqual(len(stringArray),1)
+ assertEqual(len(stringArray2D),1)
+
+
+
+def testdesignBlockRegisterMigrator():
+ SilecsDesignOld = '''<?xml version="1.0" encoding="UTF-8"?>
+ <SILECS-Design xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+ silecs-version="0.10.0" created="03/21/16" updated="03/21/16"
+ xsi:noNamespaceSchemaLocation="/common/usr/cscofe/silecs/0.10.0/silecs-model/src/xml/DesignSchema.xsd">
+ <Information>
+ <Owner user-login="schwinn" />
+ <Editor user-login="schwinn" />
+ </Information>
+ <SILECS-Class name="PneuDrive" version="0.1.0" domain="TEST">
+ <Block name="block1" mode="READ-ONLY">
+ <Register name="b1r1" synchro="MASTER" format="string" />
+ <Register name="b1r2" synchro="NONE" format="string" array-dim1="2" />
+ </Block>
+ <Block name="block2" mode="READ-WRITE">
+ <Register name="b2r1" synchro="MASTER" format="string" />
+ <Register name="b2r2" synchro="SLAVE" format="string" />
+ <Register name="b2r3" synchro="NONE" format="string" array-dim1="2" />
+ </Block>
+ <Block name="block3" mode="WRITE-ONLY">
+ <Register name="b3r1" synchro="SLAVE" format="string" />
+ <Register name="b3r2" synchro="NONE" format="string" array-dim1="2" />
+ </Block>
+ </SILECS-Class>
+ </SILECS-Design>'''
+ context = libxml2.parseDoc(SilecsDesignOld)
+ designBlockRegisterMigrator(context)
+ context.shellPrintNode() #for debug
+
+ oldBlocks = context.xpathEval("//Block")
+ oldRegisters = context.xpathEval("//Register")
+ assertEqual(len(oldBlocks),0)
+ assertEqual(len(oldRegisters),0)
+
+ block1 = context.xpathEval("/SILECS-Design/SILECS-Class/Acquisition-Block")
+ block2 = context.xpathEval("/SILECS-Design/SILECS-Class/Setting-Block")
+ block3 = context.xpathEval("/SILECS-Design/SILECS-Class/Command-Block")
+ assertEqual(len(block1),1)
+ assertEqual(len(block2),1)
+ assertEqual(len(block3),1)
+
+ b1r1 = context.xpathEval("/SILECS-Design/SILECS-Class/Acquisition-Block/Acquisition-Register[@name='b1r1']")
+ b1r2 = context.xpathEval("/SILECS-Design/SILECS-Class/Acquisition-Block/Acquisition-Register[@name='b1r2']")
+
+ b2r1 = context.xpathEval("/SILECS-Design/SILECS-Class/Setting-Block/Volatile-Register[@name='b2r1']")
+ b2r2 = context.xpathEval("/SILECS-Design/SILECS-Class/Setting-Block/Setting-Register[@name='b2r2']") # synchro = master ? --> Missconfiguration --> We should have this reg in an acquisition-block
+ b2r3 = context.xpathEval("/SILECS-Design/SILECS-Class/Setting-Block/Volatile-Register[@name='b2r3']")
+
+ b3r2 = context.xpathEval("/SILECS-Design/SILECS-Class/Command-Block/Setting-Register[@name='b3r1']")
+ b3r2 = context.xpathEval("/SILECS-Design/SILECS-Class/Command-Block/Setting-Register[@name='b3r2']")
+
+def runTests():
+ testdesignValueTypeMigrator()
+ testdesignBlockRegisterMigrator()
+ # print deployDoc # for debugging
diff --git a/silecs-codegen/src/xml/migration/runTests.py b/silecs-codegen/src/xml/migration/runTests.py
index e440c55f254c1a419c9758f2132c288f02d72101..f9b3568a4c2b869a5ee01df411c63ee059757ef8 100644
--- a/silecs-codegen/src/xml/migration/runTests.py
+++ b/silecs-codegen/src/xml/migration/runTests.py
@@ -17,7 +17,7 @@
from test.testBase import *
import migration.migration_0_9_0to0_10_0.testMigration
import migration.migration0_10_0to1_0_0.testMigration
-import migration.migration1_0_Xto1_1_0.testMigration
+import migration.migration1_0_Xto2_0_0.testMigration
SilecsDeployOld = '''<?xml version="1.0" encoding="UTF-8"?>
<SILECS-Deploy silecs-version="oldVersion" created="03/04/16" updated="03/04/16"
@@ -47,5 +47,5 @@ def runAllTests():
# runbaseTests()
migration.migration_0_9_0to0_10_0.testMigration.runTests()
migration.migration0_10_0to1_0_0.testMigration.runTests()
- migration.migration1_0_Xto1_1_0.testMigration.runTests()
+ migration.migration1_0_Xto2_0_0.testMigration.runTests()
allTestsOk()
diff --git a/silecs-codegen/src/xml/model/Block.py b/silecs-codegen/src/xml/model/Block.py
index 353b4bfd711183d079e859072121b996ade4eb39..fa969e05f392c2556245145398baab4122c3dc88 100644
--- a/silecs-codegen/src/xml/model/Block.py
+++ b/silecs-codegen/src/xml/model/Block.py
@@ -18,35 +18,42 @@ from iecommon import *
from model.Register import *
import libxml2
+
class Block(object):
+
+ ___settingBlockType = "Setting-Block"
+ ___acquisitionBlockType = "Acquisition-Block"
+ ___commandBlockType = "Command-Block"
+ name = ""
+ ___type = ""
+ xmlNode = None
def __init__(self, xmlNode):
self.xmlNode = xmlNode
-
- #xmlNode.shellPrintNode()
self.name = xmlNode.prop("name")
- self.mode = xmlNode.prop("mode")
-
+ self.___type = xmlNode.get_name()
+ #xmlNode.shellPrintNode()
+
def getNameCapitalized(self):
return iecommon.capitalizeString(self.name)
def isReadable(self):
- return self.mode == 'READ-ONLY' or self.mode == 'READ-WRITE'
+ return self.___type == self.___settingBlockType or self.___type == self.___acquisitionBlockType
def isWritable(self):
- return self.mode == 'WRITE-ONLY' or self.mode == 'READ-WRITE'
+ return self.___type == self.___settingBlockType or self.___type == self.___commandBlockType
def isAcquisition(self):
- return self.mode == 'READ-ONLY'
+ return self.___type == self.___acquisitionBlockType
def isSetting(self):
- return self.mode == 'READ-WRITE'
+ return self.___type == self.___settingBlockType
def isCommand(self):
- return self.mode == 'WRITE-ONLY'
+ return self.___type == self.___commandBlockType
def getRegisterNodes(self):
- return self.xmlNode.xpathEval("Register")
+ return self.xmlNode.xpathEval("*[name()='Acquisition-Register' or name()='Setting-Register' or name()='Volatile-Register']")
#has some additionalValues
class ParamBlock(Block):
@@ -65,7 +72,6 @@ class ParamBlock(Block):
def initWithDesignBlock(self, designBlock):
newNode = libxml2.newNode(designBlock.xmlNode.get_name())
newNode.newProp("name", designBlock.name)
- newNode.newProp("mode", designBlock.mode)
super(ParamBlock, self).__init__(newNode)
newNode.newProp("size", str(self.size))
newNode.newProp("address", str(self.address))
diff --git a/silecs-codegen/src/xml/model/Class.py b/silecs-codegen/src/xml/model/Class.py
new file mode 100644
index 0000000000000000000000000000000000000000..f7fd3d0e11cbf185624af021bea18586031c5cfe
--- /dev/null
+++ b/silecs-codegen/src/xml/model/Class.py
@@ -0,0 +1,112 @@
+#!/usr/bin/python
+# Copyright 2016 CERN and GSI
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+from iecommon import *
+from model.Block import *
+import libxml2
+
+class Class(object):
+
+ name = ""
+ version = ""
+ xmlNode = None
+
+ def __init__(self, xmlNode):
+ self.xmlNode = xmlNode
+ self.name = xmlNode.prop("name")
+ self.version = xmlNode.prop("version")
+ #xmlNode.shellPrintNode()
+
+ def getNameCapitalized(self):
+ return iecommon.capitalizeString(self.name)
+
+ def getBlockNodes(self):
+ return self.xmlNode.xpathEval("*[name()='Acquisition-Block' or name()='Setting-Block' or name()='Command-Block']")
+
+class ParamClass(Class):
+ def __init__(self):
+ self.address = 0
+ self.usedMemory = ""
+
+
+ def initWithParamClassNode(self, xmlNode):
+ super(ParamClass, self).__init__(xmlNode)
+ self.address = long(self.xmlNode.prop("address"))
+ self.usedMemory = self.xmlNode.prop("usedMemory")
+
+ def initWithDesignClass(self, designClass):
+ newNode = libxml2.newNode(designClass.xmlNode.get_name())
+ newNode.newProp("name", designClass.name)
+ newNode.newProp("version", designClass.version)
+ super(ParamClass, self).__init__(newNode)
+ newNode.newProp("address", str(self.address))
+ newNode.newProp("usedMemory", self.usedMemory)
+
+ def setAddress(self,address):
+ self.xmlNode.setProp("address", str(address))
+ self.address = address
+
+ def setUsedMemory(self,usedMemory):
+ self.xmlNode.setProp("usedMemory", usedMemory)
+ self.usedMemory = usedMemory
+
+ def getParamBlocks(self):
+ paramBlocks = []
+ for blockNode in self.getBlockNodes():
+ paramBlock = ParamBlock()
+ paramBlock.initWithParamBlockNode(blockNode)
+ paramBlocks.append(paramBlock)
+ return paramBlocks
+
+ def getDeviceInstanceNodes(self):
+ deviceNodes = self.xmlNode.xpathEval("Instance")
+ return deviceNodes
+
+ @staticmethod
+ def getParamClassesFromRootNode(silecsRoot):
+ classNodes = silecsRoot.xpathEval("/SILECS-Param/SILECS-Mapping/SILECS-Class")
+ if len(classNodes) < 1:
+ raise BaseException("Error: no class-node found in design-document")
+ paramClasses = []
+ for classNode in classNodes:
+ paramClass = ParamClass()
+ paramClass.initWithParamClassNode(classNode)
+ paramClasses.append(paramClass)
+ return paramClasses
+
+
+class DesignClass(Class):
+ def __init__(self, xmlNode):
+ super(DesignClass, self).__init__(xmlNode)
+ self.fesaPropertyName = self.name
+
+ def getFesaName(self):
+ return self.fesaPropertyName
+
+ def getDesignBlocks(self):
+ designBlocks = []
+ for blockNode in self.getBlockNodes():
+ designBlocks.append(DesignBlock(blockNode))
+ return designBlocks
+
+ @staticmethod
+ def getDesignClassFromRootNode(silecsRoot):
+ classNodes = silecsRoot.xpathEval('/SILECS-Design/SILECS-Class')
+ if len(classNodes) > 1:
+ raise "Error: multiple class-nodes found in design-document"
+ if len(classNodes) < 1:
+ raise "Error: no class-node found in design-document"
+ return DesignClass(classNodes[0])
diff --git a/silecs-codegen/src/xml/model/Register.py b/silecs-codegen/src/xml/model/Register.py
index 54abe60c49dd0dddf2ee5a43c7001fae9bfa5339..ac69f2134ce6b9c4926784a2706e66264c4e0116 100644
--- a/silecs-codegen/src/xml/model/Register.py
+++ b/silecs-codegen/src/xml/model/Register.py
@@ -18,9 +18,13 @@ from iecommon import *
import libxml2
class Register(object):
+ ___settingRegisterType = "Setting-Register"
+ ___acquisitionRegisterType = "Acquisition-Register"
+ ___volatileRegisterType = "Volatile-Register"
+
+ ___type = ""
xmlNode = None
name = ""
- synchro = ""
valueTypeNode = None
valueType = ""
dim1 = 1
@@ -33,7 +37,7 @@ class Register(object):
#xmlNode.shellPrintNode()
self.name = xmlNode.prop("name")
- self.syncro = xmlNode.prop("synchro")
+ self.___type = xmlNode.get_name()
valueTypes = xmlNode.xpathEval("*[name()='scalar' or name()='array' or name()='array2D' or name()='string' or name()='stringArray' or name()='stringArray2D']")
if not valueTypes:
@@ -92,13 +96,13 @@ class Register(object):
return self.isArray() or self.isArray2D()
def isAcquisition(self):
- return self.syncro == 'MASTER'
+ return self.___type == self.___acquisitionRegisterType
def isSetting(self):
- return self.syncro == 'SLAVE'
+ return self.___type == self.___settingRegisterType
def isVolatile(self):
- return self.syncro == 'NONE'
+ return self.___type == self.___volatileRegisterType
def getCType(self):
return {
@@ -161,14 +165,14 @@ class Register(object):
#Needed for SilecsMethodNames
def getSilecsDataTypeUpperCase(self):
- type = self.getSilecsDataType()
+ silecsType = self.getSilecsDataType()
typeUpperCase = ""
- if type[0] == 'u':
- typeUpperCase = type[:2].upper() + type[2:] # first two characters if unsigned
- elif type == 'date':
+ if silecsType[0] == 'u':
+ typeUpperCase = silecsType[:2].upper() + silecsType[2:] # first two characters if unsigned
+ elif silecsType == 'date':
typeUpperCase = 'Date'
else:
- typeUpperCase = type[:1].upper() + type[1:] # only first character if not unsigned
+ typeUpperCase = silecsType[:1].upper() + silecsType[1:] # only first character if not unsigned
return typeUpperCase
#has some additionalValues
diff --git a/silecs-codegen/src/xml/test/AllTypes.silecsdesign b/silecs-codegen/src/xml/test/AllTypes.silecsdesign
index 8b41ca0c8a0bca2b7db698a94a45917901e89446..32e28db9ac963c8eb8fa7b1ecda2f270ac0050dd 100644
--- a/silecs-codegen/src/xml/test/AllTypes.silecsdesign
+++ b/silecs-codegen/src/xml/test/AllTypes.silecsdesign
@@ -1,177 +1,177 @@
<?xml version="1.0" encoding="UTF-8"?>
-<SILECS-Design xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" silecs-version="1.1.0" created="06/27/16" updated="06/27/16" xsi:noNamespaceSchemaLocation="/common/home/bel/schwinn/lnx/git/silecs-model/src/xml/DesignSchema.xsd">
+<SILECS-Design xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" silecs-version="2.0.0" created="06/27/16" updated="06/27/16" xsi:noNamespaceSchemaLocation="/common/home/bel/schwinn/lnx/git/silecs-model/src/xml/DesignSchema.xsd">
<Information>
- <Owner user-login="schwinn" />
- <Editor user-login="schwinn" />
+ <Owner user-login="schwinn"/>
+ <Editor user-login="schwinn"/>
</Information>
<SILECS-Class name="AllTypes" version="0.1.0" domain="OPERATIONAL">
- <Block name="MyROBlock" mode="READ-ONLY" generateFesaProperty="true" fesaPropertyName="MyROBlockProp">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true">
- <scalar format="int8" />
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa">
- <scalar format="uint8" />
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa">
- <scalar format="int16" />
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa">
- <scalar format="uint16" />
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa">
- <scalar format="int32" />
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa">
- <scalar format="uint32" />
- </Register>
+ <Acquisition-Block name="MyROBlock" generateFesaProperty="true" fesaPropertyName="MyROBlockProp">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true">
+ <scalar format="int8"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa">
+ <scalar format="uint8"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa">
+ <scalar format="int16"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa">
+ <scalar format="uint16"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa">
+ <scalar format="int32"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa">
+ <scalar format="uint32"/>
+ </Acquisition-Register>
<!--<Register name="RO_int64" format="int64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int64_fesa"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
<!--<Register name="RO_uint64" format="uint64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint64_fesa"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa">
- <scalar format="float32" />
- </Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa">
+ <scalar format="float32"/>
+ </Acquisition-Register>
<!--<Register name="RO_float64" format="float64" synchro="MASTER" generateFesaValueItem="true" esaFieldName="RO_float64_fesa"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa">
- <string string-length="64" format="string" />
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa">
- <scalar format="date" />
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa">
- <scalar format="char" />
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa">
- <scalar format="byte" />
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa">
- <scalar format="word" />
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa">
- <scalar format="dword" />
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa">
- <scalar format="int" />
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa">
- <scalar format="dint" />
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa">
- <scalar format="real" />
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa">
- <scalar format="dt" />
- </Register>
- </Block>
- <Block name="MyRWBlock" generateFesaProperty="true" fesaPropertyName="MyRWBlockProp" mode="READ-WRITE">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true">
- <array2D dim1="2" dim2="2" format="int8" />
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa">
- <array2D dim1="2" dim2="2" format="uint8" />
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa">
- <array2D dim1="2" dim2="2" format="int16" />
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa">
- <array2D dim1="2" dim2="2" format="uint16" />
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa">
- <array2D dim1="2" dim2="2" format="int32" />
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa">
- <array2D dim1="2" dim2="2" format="uint32" />
- </Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa">
+ <string string-length="64" format="string"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa">
+ <scalar format="date"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa">
+ <scalar format="char"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa">
+ <scalar format="byte"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa">
+ <scalar format="word"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa">
+ <scalar format="dword"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa">
+ <scalar format="int"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa">
+ <scalar format="dint"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa">
+ <scalar format="real"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa">
+ <scalar format="dt"/>
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" generateFesaProperty="true" fesaPropertyName="MyRWBlockProp">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true">
+ <array2D dim1="2" dim2="2" format="int8"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa">
+ <array2D dim1="2" dim2="2" format="uint8"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa">
+ <array2D dim1="2" dim2="2" format="int16"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa">
+ <array2D dim1="2" dim2="2" format="uint16"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa">
+ <array2D dim1="2" dim2="2" format="int32"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa">
+ <array2D dim1="2" dim2="2" format="uint32"/>
+ </Volatile-Register>
<!--<Register name="RW_int64" format="int64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int64_fesa" array-dim1="2" array-dim2="2"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
<!--<Register name="RW_uint64" format="uint64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint64_fesa" array-dim1="2" array-dim2="2"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa">
- <array2D dim1="2" dim2="2" format="float32" />
- </Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa">
+ <array2D dim1="2" dim2="2" format="float32"/>
+ </Volatile-Register>
<!--<Register name="RW_float64" format="float64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float64_fesa" array-dim1="2" array-dim2="2"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa">
- <stringArray2D dim1="2" dim2="2" string-length="64" format="string" />
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa">
- <array2D dim1="2" dim2="2" format="date" />
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa">
- <array2D dim1="2" dim2="2" format="char" />
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa">
- <array2D dim1="2" dim2="2" format="byte" />
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa">
- <array2D dim1="2" dim2="2" format="word" />
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa">
- <array2D dim1="2" dim2="2" format="dword" />
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa">
- <array2D dim1="2" dim2="2" format="int" />
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa">
- <array2D dim1="2" dim2="2" format="dint" />
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa">
- <array2D dim1="2" dim2="2" format="real" />
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa">
- <array2D dim1="2" dim2="2" format="dt" />
- </Register>
- </Block>
- <Block name="MyWOBlock" generateFesaProperty="true" fesaPropertyName="MyWOBlockProp" mode="WRITE-ONLY">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true">
- <array dim="10" format="int8" />
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa">
- <array dim="10" format="uint8" />
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa">
- <array dim="10" format="int16" />
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa">
- <array dim="10" format="uint16" />
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa">
- <array dim="10" format="int32" />
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa">
- <array dim="10" format="uint32" />
- </Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa">
+ <stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa">
+ <array2D dim1="2" dim2="2" format="date"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa">
+ <array2D dim1="2" dim2="2" format="char"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa">
+ <array2D dim1="2" dim2="2" format="byte"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa">
+ <array2D dim1="2" dim2="2" format="word"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa">
+ <array2D dim1="2" dim2="2" format="dword"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa">
+ <array2D dim1="2" dim2="2" format="int"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa">
+ <array2D dim1="2" dim2="2" format="dint"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa">
+ <array2D dim1="2" dim2="2" format="real"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa">
+ <array2D dim1="2" dim2="2" format="dt"/>
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" generateFesaProperty="true" fesaPropertyName="MyWOBlockProp">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true">
+ <array dim="10" format="int8"/>
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa">
+ <array dim="10" format="uint8"/>
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa">
+ <array dim="10" format="int16"/>
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa">
+ <array dim="10" format="uint16"/>
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa">
+ <array dim="10" format="int32"/>
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa">
+ <array dim="10" format="uint32"/>
+ </Setting-Register>
<!--<Register name="WO_int64" format="int64" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int64_fesa" array-dim1="10"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
<!--<Register name="WO_uint64" format="uint64" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint64_fesa" array-dim1="10"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa">
- <array dim="10" format="float32" />
- </Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa">
+ <array dim="10" format="float32"/>
+ </Setting-Register>
<!--<Register name="WO_float64" format="float64" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float64_fesa" array-dim1="10"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa">
- <stringArray dim="10" string-length="64" format="string" />
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa">
- <array dim="10" format="date" />
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa">
- <array dim="10" format="char" />
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa">
- <array dim="10" format="byte" />
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa">
- <array dim="10" format="word" />
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa">
- <array dim="10" format="dword" />
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa">
- <array dim="10" format="int" />
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa">
- <array dim="10" format="dint" />
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa">
- <array dim="10" format="real" />
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa">
- <array dim="10" format="dt" />
- </Register>
- </Block>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa">
+ <stringArray dim="10" string-length="64" format="string"/>
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa">
+ <array dim="10" format="date"/>
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa">
+ <array dim="10" format="char"/>
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa">
+ <array dim="10" format="byte"/>
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa">
+ <array dim="10" format="word"/>
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa">
+ <array dim="10" format="dword"/>
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa">
+ <array dim="10" format="int"/>
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa">
+ <array dim="10" format="dint"/>
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa">
+ <array dim="10" format="real"/>
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa">
+ <array dim="10" format="dt"/>
+ </Setting-Register>
+ </Command-Block>
</SILECS-Class>
</SILECS-Design>
diff --git a/silecs-codegen/src/xml/test/AllTypesDU.silecsdeploy b/silecs-codegen/src/xml/test/AllTypesDU.silecsdeploy
index 67fe6fc6f201f4cbf09ae9158321ddb6b7eb52ba..871b51c97d85c733a48c700ab5983377ccc8247b 100644
--- a/silecs-codegen/src/xml/test/AllTypesDU.silecsdeploy
+++ b/silecs-codegen/src/xml/test/AllTypesDU.silecsdeploy
@@ -1,7 +1,7 @@
<?xml version="1.0" encoding="UTF-8"?>
-<SILECS-Deploy silecs-version="0.10.0" created="06/27/16" updated="06/27/16"
+<SILECS-Deploy silecs-version="2.0.0" created="06/27/16" updated="06/27/16"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
- xsi:noNamespaceSchemaLocation="/common/home/bel/schwinn/lnx/workspace-silecs-mars/silecs-model/src/xml/DeploySchema.xsd">
+ xsi:noNamespaceSchemaLocation="/common/home/bel/schwinn/lnx/git/silecs-model/src/xml/DeploySchema.xsd">
<Information>
<Owner user-login="schwinn"/>
<Editor user-login="schwinn"/>
diff --git a/silecs-codegen/src/xml/test/AllTypesFESA.silecsdesign b/silecs-codegen/src/xml/test/AllTypesFESA.silecsdesign
index aa5455d86658a4b4b78e0e667e16d5616331c767..219be566a846587d4828fd99621b4c80879c253d 100644
--- a/silecs-codegen/src/xml/test/AllTypesFESA.silecsdesign
+++ b/silecs-codegen/src/xml/test/AllTypesFESA.silecsdesign
@@ -1,175 +1,175 @@
<?xml version="1.0" encoding="UTF-8"?>
-<SILECS-Design xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" silecs-version="1.1.0" created="06/27/16" updated="06/27/16" xsi:noNamespaceSchemaLocation="/common/home/bel/schwinn/lnx/git/silecs-model/src/xml/DesignSchema.xsd">
+<SILECS-Design xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" silecs-version="2.0.0" created="06/27/16" updated="06/27/16" xsi:noNamespaceSchemaLocation="/common/home/bel/schwinn/lnx/git/silecs-model/src/xml/DesignSchema.xsd">
<Information>
- <Owner user-login="schwinn" />
- <Editor user-login="schwinn" />
+ <Owner user-login="schwinn"/>
+ <Editor user-login="schwinn"/>
</Information>
<SILECS-Class name="AllTypesFESA" version="0.1.0" domain="OPERATIONAL">
- <Block name="MyROBlock" mode="READ-ONLY" generateFesaProperty="true" fesaPropertyName="MyROBlockProp">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true">
- <scalar format="int8" />
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa">
- <scalar format="uint8" />
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa">
- <scalar format="int16" />
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa">
- <scalar format="uint16" />
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa">
- <scalar format="int32" />
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa">
- <scalar format="uint32" />
- </Register>
+ <Acquisition-Block name="MyROBlock" generateFesaProperty="true" fesaPropertyName="MyROBlockProp">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true">
+ <scalar format="int8"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa">
+ <scalar format="uint8"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa">
+ <scalar format="int16"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa">
+ <scalar format="uint16"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa">
+ <scalar format="int32"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa">
+ <scalar format="uint32"/>
+ </Acquisition-Register>
<!--<Register name="RO_int64" format="int64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int64_fesa"/> not Supported for Beckhoff, Siemens and Schneider -->
<!--<Register name="RO_uint64" format="uint64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint64_fesa"/> not Supported for Beckhoff, Siemens and Schneider -->
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa">
- <scalar format="float32" />
- </Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa">
+ <scalar format="float32"/>
+ </Acquisition-Register>
<!--<Register name="RO_float64" format="float64" synchro="MASTER" generateFesaValueItem="true" esaFieldName="RO_float64_fesa"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa">
- <string string-length="64" format="string" />
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa">
- <scalar format="date" />
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa">
- <scalar format="char" />
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa">
- <scalar format="byte" />
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa">
- <scalar format="word" />
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa">
- <scalar format="dword" />
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa">
- <scalar format="int" />
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa">
- <scalar format="dint" />
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa">
- <scalar format="real" />
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa">
- <scalar format="dt" />
- </Register>
- </Block>
- <Block name="MyRWBlock" generateFesaProperty="true" fesaPropertyName="MyRWBlockProp" mode="READ-WRITE">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true">
- <array2D dim1="2" dim2="2" format="int8" />
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa">
- <array2D dim1="2" dim2="2" format="uint8" />
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa">
- <array2D dim1="2" dim2="2" format="int16" />
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa">
- <array2D dim1="2" dim2="2" format="uint16" />
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa">
- <array2D dim1="2" dim2="2" format="int32" />
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa">
- <array2D dim1="2" dim2="2" format="uint32" />
- </Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa">
+ <string string-length="64" format="string"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa">
+ <scalar format="date"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa">
+ <scalar format="char"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa">
+ <scalar format="byte"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa">
+ <scalar format="word"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa">
+ <scalar format="dword"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa">
+ <scalar format="int"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa">
+ <scalar format="dint"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa">
+ <scalar format="real"/>
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa">
+ <scalar format="dt"/>
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" generateFesaProperty="true" fesaPropertyName="MyRWBlockProp">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true">
+ <array2D dim1="2" dim2="2" format="int8"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa">
+ <array2D dim1="2" dim2="2" format="uint8"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa">
+ <array2D dim1="2" dim2="2" format="int16"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa">
+ <array2D dim1="2" dim2="2" format="uint16"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa">
+ <array2D dim1="2" dim2="2" format="int32"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa">
+ <array2D dim1="2" dim2="2" format="uint32"/>
+ </Volatile-Register>
<!-- <Register name="RW_int64" format="int64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int64_fesa" array-dim1="2" array-dim2="2"/> not Supported for Beckhoff, Siemens and Schneider -->
<!--<Register name="RW_uint64" format="uint64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint64_fesa" array-dim1="2" array-dim2="2"/> not Supported for Beckhoff, Siemens and Schneider -->
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa">
- <array2D dim1="2" dim2="2" format="float32" />
- </Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa">
+ <array2D dim1="2" dim2="2" format="float32"/>
+ </Volatile-Register>
<!--<Register name="RW_float64" format="float64" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float64_fesa" array-dim1="2" array-dim2="2"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
<!-- <Register name="RW_string" format="string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" array-dim1="2" array-dim2="2"/> 2d string arrays not supported in FESA -->
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa">
- <array2D dim1="2" dim2="2" format="date" />
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa">
- <array2D dim1="2" dim2="2" format="char" />
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa">
- <array2D dim1="2" dim2="2" format="byte" />
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa">
- <array2D dim1="2" dim2="2" format="word" />
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa">
- <array2D dim1="2" dim2="2" format="dword" />
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa">
- <array2D dim1="2" dim2="2" format="int" />
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa">
- <array2D dim1="2" dim2="2" format="dint" />
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa">
- <array2D dim1="2" dim2="2" format="real" />
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa">
- <array2D dim1="2" dim2="2" format="dt" />
- </Register>
- </Block>
- <Block name="MyWOBlock" generateFesaProperty="true" fesaPropertyName="MyWOBlockProp" mode="WRITE-ONLY">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true">
- <array dim="10" format="int8" />
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa">
- <array dim="10" format="uint8" />
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa">
- <array dim="10" format="int16" />
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa">
- <array dim="10" format="uint16" />
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa">
- <array dim="10" format="int32" />
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa">
- <array dim="10" format="uint32" />
- </Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa">
+ <array2D dim1="2" dim2="2" format="date"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa">
+ <array2D dim1="2" dim2="2" format="char"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa">
+ <array2D dim1="2" dim2="2" format="byte"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa">
+ <array2D dim1="2" dim2="2" format="word"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa">
+ <array2D dim1="2" dim2="2" format="dword"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa">
+ <array2D dim1="2" dim2="2" format="int"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa">
+ <array2D dim1="2" dim2="2" format="dint"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa">
+ <array2D dim1="2" dim2="2" format="real"/>
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa">
+ <array2D dim1="2" dim2="2" format="dt"/>
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" generateFesaProperty="true" fesaPropertyName="MyWOBlockProp">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true">
+ <array dim="10" format="int8"/>
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa">
+ <array dim="10" format="uint8"/>
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa">
+ <array dim="10" format="int16"/>
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa">
+ <array dim="10" format="uint16"/>
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa">
+ <array dim="10" format="int32"/>
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa">
+ <array dim="10" format="uint32"/>
+ </Setting-Register>
<!--<Register name="WO_int64" format="int64" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int64_fesa" array-dim1="10"/> not Supported for Beckhoff, Siemens and Schneider -->
<!--<Register name="WO_uint64" format="uint64" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint64_fesa" array-dim1="10"/> not Supported for Beckhoff, Siemens and Schneider -->
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa">
- <array dim="10" format="float32" />
- </Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa">
+ <array dim="10" format="float32"/>
+ </Setting-Register>
<!--<Register name="WO_float64" format="float64" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float64_fesa" array-dim1="10"/> not Supported for Rabbit, Beckhoff, Siemens and Schneider -->
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa">
- <stringArray dim="10" string-length="64" format="string" />
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa">
- <array dim="10" format="date" />
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa">
- <array dim="10" format="char" />
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa">
- <array dim="10" format="byte" />
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa">
- <array dim="10" format="word" />
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa">
- <array dim="10" format="dword" />
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa">
- <array dim="10" format="int" />
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa">
- <array dim="10" format="dint" />
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa">
- <array dim="10" format="real" />
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa">
- <array dim="10" format="dt" />
- </Register>
- </Block>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa">
+ <stringArray dim="10" string-length="64" format="string"/>
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa">
+ <array dim="10" format="date"/>
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa">
+ <array dim="10" format="char"/>
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa">
+ <array dim="10" format="byte"/>
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa">
+ <array dim="10" format="word"/>
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa">
+ <array dim="10" format="dword"/>
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa">
+ <array dim="10" format="int"/>
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa">
+ <array dim="10" format="dint"/>
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa">
+ <array dim="10" format="real"/>
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa">
+ <array dim="10" format="dt"/>
+ </Setting-Register>
+ </Command-Block>
</SILECS-Class>
</SILECS-Design>
diff --git a/silecs-codegen/src/xml/test/fesa/generateFesaDesignTest.py b/silecs-codegen/src/xml/test/fesa/generateFesaDesignTest.py
index 620f75e4a9b7924751aa31e7f4903d9f59cc0126..e995f16f382bc531fb612ca642e3c9c16e36b733 100644
--- a/silecs-codegen/src/xml/test/fesa/generateFesaDesignTest.py
+++ b/silecs-codegen/src/xml/test/fesa/generateFesaDesignTest.py
@@ -31,16 +31,16 @@ simpleSilecsDesign = '''<?xml version="1.0" encoding="UTF-8"?>
<Editor user-login="schwinn"/>
</Information>
<SILECS-Class name="Test123" version="0.1.0" domain="OPERATIONAL">
- <Block name="Setting" mode="READ-WRITE" generateFesaProperty="true">
- <Register name="mySettingRegister" synchro="MASTER" generateFesaValueItem="true">
+ <Setting-Block name="Setting" generateFesaProperty="true">
+ <Setting-Register name="mySettingRegister" generateFesaValueItem="true">
<scalar format="uint8"/>
- </Register>
- </Block>
- <Block name="Acquisition" mode="READ-ONLY" generateFesaProperty="true">
- <Register name="myAcqRegister" synchro="MASTER" generateFesaValueItem="true">
+ </Setting-Register>
+ </Setting-Block>
+ <Acquisition-Block name="Acquisition" generateFesaProperty="true">
+ <Acquisition-Register name="myAcqRegister" generateFesaValueItem="true">
<scalar format="uint8"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
</SILECS-Class>
</SILECS-Design>'''
simpleSilecsDesignRoot = libxml2.parseDoc(simpleSilecsDesign)
@@ -55,6 +55,7 @@ def testFillXML_EmptyTemplate_3_0_0(generator):
def testFillXML_GSITemplate_3_0_0(generator):
fesaRoot = libxml2.parseFile("test/fesa/GSIClassTemplateFESA300.xml")
generator.fillXML('3.0.0', 'MyClass', fesaRoot,simpleSilecsDesignRoot,logTopics={'errorlog': True})
+
assertTrue( fesaRoot.xpathEval('/equipment-model/events') != None )
assertTrue( fesaRoot.xpathEval('/equipment-model/scheduling-units') != None )
@@ -62,6 +63,7 @@ def testFillXML_GSITemplate_3_0_0(generator):
firstGSIAcqProp = acquisition.xpathEval('GSI-Acquisition-Property')[0]
assertTrue( acquisition.xpathEval('*')[0].prop('name') != firstGSIAcqProp.prop('name') ) # check if generated at right position
assertEqual( firstGSIAcqProp.prop('name'),"Acquisition" )
+ firstGSIAcqProp.shellPrintNode() #for debug
valueItem = firstGSIAcqProp.xpathEval('value-item')[0]
assertTrue( valueItem != None )
diff --git a/silecs-codegen/src/xml/test/generated_correct/AllTypesFESA.design b/silecs-codegen/src/xml/test/generated_correct/AllTypesFESA.design
index 54d04650ff59b2e2527443f19c42da14aa15ba21..b804989eb5c7d33e2db43b5e7edfe14145d8f74a 100644
--- a/silecs-codegen/src/xml/test/generated_correct/AllTypesFESA.design
+++ b/silecs-codegen/src/xml/test/generated_correct/AllTypesFESA.design
@@ -586,7 +586,7 @@
</GSI-module-status-labels-field>
</configuration>
<setting>
- <field name="WO_dt_fesa" shared="true" multiplexed="false" persistent="true"><array type="double"><dim>10</dim></array></field><field name="WO_real_fesa" shared="true" multiplexed="false" persistent="true"><array type="float"><dim>10</dim></array></field><field name="WO_dint_fesa" shared="true" multiplexed="false" persistent="true"><array type="int32_t"><dim>10</dim></array></field><field name="WO_int_fesa" shared="true" multiplexed="false" persistent="true"><array type="int16_t"><dim>10</dim></array></field><field name="WO_dword_fesa" shared="true" multiplexed="false" persistent="true"><array type="int64_t"><dim>10</dim></array></field><field name="WO_word_fesa" shared="true" multiplexed="false" persistent="true"><array type="int32_t"><dim>10</dim></array></field><field name="WO_byte_fesa" shared="true" multiplexed="false" persistent="true"><array type="int16_t"><dim>10</dim></array></field><field name="WO_char_fesa" shared="true" multiplexed="false" persistent="true"><array type="int8_t"><dim>10</dim></array></field><field name="WO_date_fesa" shared="true" multiplexed="false" persistent="true"><array type="double"><dim>10</dim></array></field><field name="WO_string_fesa" shared="true" multiplexed="false" persistent="true"><array2D type="char"><dim1>10</dim1><dim2>64</dim2></array2D></field><field name="WO_float32_fesa" shared="true" multiplexed="false" persistent="true"><array type="float"><dim>10</dim></array></field><field name="WO_uint32_fesa" shared="true" multiplexed="false" persistent="true"><array type="int64_t"><dim>10</dim></array></field><field name="WO_int32_fesa" shared="true" multiplexed="false" persistent="true"><array type="int32_t"><dim>10</dim></array></field><field name="WO_uint16_fesa" shared="true" multiplexed="false" persistent="true"><array type="int32_t"><dim>10</dim></array></field><field name="WO_int16_fesa" shared="true" multiplexed="false" persistent="true"><array type="int16_t"><dim>10</dim></array></field><field name="WO_uint8_fesa" shared="true" multiplexed="false" persistent="true"><array type="int16_t"><dim>10</dim></array></field><field name="WO_int8" shared="true" multiplexed="false" persistent="true"><array type="int8_t"><dim>10</dim></array></field><field name="RW_dt_fesa" multiplexed="false" persistent="true"><array2D type="double"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_real_fesa" multiplexed="false" persistent="true"><array2D type="float"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_dint_fesa" multiplexed="false" persistent="true"><array2D type="int32_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_int_fesa" multiplexed="false" persistent="true"><array2D type="int16_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_dword_fesa" multiplexed="false" persistent="true"><array2D type="int64_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_word_fesa" multiplexed="false" persistent="true"><array2D type="int32_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_byte_fesa" multiplexed="false" persistent="true"><array2D type="int16_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_char_fesa" multiplexed="false" persistent="true"><array2D type="int8_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_date_fesa" multiplexed="false" persistent="true"><array2D type="double"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_float32_fesa" multiplexed="false" persistent="true"><array2D type="float"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_uint32_fesa" multiplexed="false" persistent="true"><array2D type="int64_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_int32_fesa" multiplexed="false" persistent="true"><array2D type="int32_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_uint16_fesa" multiplexed="false" persistent="true"><array2D type="int32_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_int16_fesa" multiplexed="false" persistent="true"><array2D type="int16_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_uint8_fesa" multiplexed="false" persistent="true"><array2D type="int16_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_int8" multiplexed="false" persistent="true"><array2D type="int8_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><GSI-power-field multiplexed="false" name="power" persistent="false">
+ <field name="WO_dt_fesa" multiplexed="false" persistent="true"><array type="double"><dim>10</dim></array></field><field name="WO_real_fesa" multiplexed="false" persistent="true"><array type="float"><dim>10</dim></array></field><field name="WO_dint_fesa" multiplexed="false" persistent="true"><array type="int32_t"><dim>10</dim></array></field><field name="WO_int_fesa" multiplexed="false" persistent="true"><array type="int16_t"><dim>10</dim></array></field><field name="WO_dword_fesa" multiplexed="false" persistent="true"><array type="int64_t"><dim>10</dim></array></field><field name="WO_word_fesa" multiplexed="false" persistent="true"><array type="int32_t"><dim>10</dim></array></field><field name="WO_byte_fesa" multiplexed="false" persistent="true"><array type="int16_t"><dim>10</dim></array></field><field name="WO_char_fesa" multiplexed="false" persistent="true"><array type="int8_t"><dim>10</dim></array></field><field name="WO_date_fesa" multiplexed="false" persistent="true"><array type="double"><dim>10</dim></array></field><field name="WO_string_fesa" multiplexed="false" persistent="true"><array2D type="char"><dim1>10</dim1><dim2>64</dim2></array2D></field><field name="WO_float32_fesa" multiplexed="false" persistent="true"><array type="float"><dim>10</dim></array></field><field name="WO_uint32_fesa" multiplexed="false" persistent="true"><array type="int64_t"><dim>10</dim></array></field><field name="WO_int32_fesa" multiplexed="false" persistent="true"><array type="int32_t"><dim>10</dim></array></field><field name="WO_uint16_fesa" multiplexed="false" persistent="true"><array type="int32_t"><dim>10</dim></array></field><field name="WO_int16_fesa" multiplexed="false" persistent="true"><array type="int16_t"><dim>10</dim></array></field><field name="WO_uint8_fesa" multiplexed="false" persistent="true"><array type="int16_t"><dim>10</dim></array></field><field name="WO_int8" multiplexed="false" persistent="true"><array type="int8_t"><dim>10</dim></array></field><field name="RW_dt_fesa" multiplexed="false" persistent="false"><array2D type="double"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_real_fesa" multiplexed="false" persistent="false"><array2D type="float"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_dint_fesa" multiplexed="false" persistent="false"><array2D type="int32_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_int_fesa" multiplexed="false" persistent="false"><array2D type="int16_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_dword_fesa" multiplexed="false" persistent="false"><array2D type="int64_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_word_fesa" multiplexed="false" persistent="false"><array2D type="int32_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_byte_fesa" multiplexed="false" persistent="false"><array2D type="int16_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_char_fesa" multiplexed="false" persistent="false"><array2D type="int8_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_date_fesa" multiplexed="false" persistent="false"><array2D type="double"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_float32_fesa" multiplexed="false" persistent="false"><array2D type="float"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_uint32_fesa" multiplexed="false" persistent="false"><array2D type="int64_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_int32_fesa" multiplexed="false" persistent="false"><array2D type="int32_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_uint16_fesa" multiplexed="false" persistent="false"><array2D type="int32_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_int16_fesa" multiplexed="false" persistent="false"><array2D type="int16_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_uint8_fesa" multiplexed="false" persistent="false"><array2D type="int16_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><field name="RW_int8" multiplexed="false" persistent="false"><array2D type="int8_t"><dim1>2</dim1><dim2>2</dim2></array2D></field><GSI-power-field multiplexed="false" name="power" persistent="false">
<custom-type-scalar data-type-name-ref="DEVICE_POWER"/>
</GSI-power-field>
</setting>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Beckhoff_BC9020.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Beckhoff_BC9020.silecsparam
index 8095901cd438800c0fd2a40bc48fd67ba4057e74..ca98dcf2910ad4bcfcf5657ff549181471fb4393 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Beckhoff_BC9020.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Beckhoff_BC9020.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:01.024808"/>
- <Deployment checksum="3184721915"/>
+ <Generation date="2017-06-08 16:28:46.858569"/>
+ <Deployment checksum="1037751963"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Beckhoff_BC9020" plc-brand="BECKHOFF" plc-system="TWINCat" plc-model="BC9020" protocol="BLOCK_MODE" address="32768" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="32768" used-mem="MW16384..MW16407 / 24 words">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="32768" mem-size="48">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="17">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="32768" usedMemory="MW16384..MW16407 / 24 words">
+ <Acquisition-Block name="hdrBlk" size="14" address="32768" mem-size="48">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="17">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="18" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="18" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="22" mem-size="17">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="22" mem-size="17">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="40" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="40" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="32816" used-mem="MW16408..MW18167 / 1760 words">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="32816" mem-size="122">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="1">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="32816" usedMemory="MW16408..MW18167 / 1760 words">
+ <Acquisition-Block name="MyROBlock" size="53" address="32816" mem-size="122">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="1">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="1">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="65">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="65">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="86" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="86" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="94" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="94" mem-size="1">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="96" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="96" mem-size="1">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="98" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="98" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="100" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="100" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="104" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="104" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="106" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="106" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="110" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="110" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="114" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="114" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="33060" mem-size="468">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="4">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="33060" mem-size="468">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="4">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="260">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="260">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="332" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="332" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="364" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="364" mem-size="4">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="368" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="368" mem-size="4">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="372" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="372" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="380" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="380" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="396" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="396" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="404" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="404" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="420" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="420" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="436" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="436" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="33996" mem-size="1170">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="10">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="33996" mem-size="1170">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="10">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="650">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="650">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="830" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="830" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="910" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="910" mem-size="10">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="920" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="920" mem-size="10">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="930" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="930" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="950" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="950" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="990" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="990" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1010" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1010" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1050" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1050" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1090" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1090" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="0"/>
<Instance label="testDevice2" address="1"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Beckhoff_CX9020.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Beckhoff_CX9020.silecsparam
index e36c8eb1d6b16ee823d8ffc896a7dbeff4a77aa6..4fcb642236de6184edf5a11df540c371b19e7d55 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Beckhoff_CX9020.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Beckhoff_CX9020.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:01.058078"/>
- <Deployment checksum="656547166"/>
+ <Generation date="2017-06-08 16:28:46.893890"/>
+ <Deployment checksum="2754857673"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Beckhoff_CX9020" plc-brand="BECKHOFF" plc-system="TWINCat" plc-model="CX9020" protocol="BLOCK_MODE" address="24576" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="24576" used-mem="MW12288..MW12313 / 26 words">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="24576" mem-size="52">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="17">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="24576" usedMemory="MW12288..MW12313 / 26 words">
+ <Acquisition-Block name="hdrBlk" size="14" address="24576" mem-size="52">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="17">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="20" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="20" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="24" mem-size="17">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="24" mem-size="17">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="44" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="44" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="24628" used-mem="MW12314..MW14081 / 1768 words">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="24628" mem-size="128">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="1">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="24628" usedMemory="MW12314..MW14081 / 1768 words">
+ <Acquisition-Block name="MyROBlock" size="53" address="24628" mem-size="128">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="1">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="1">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="65">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="65">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="88" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="88" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="96" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="96" mem-size="1">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="98" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="98" mem-size="1">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="100" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="100" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="104" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="104" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="108" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="108" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="112" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="112" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="116" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="116" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="120" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="120" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="24884" mem-size="468">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="4">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="24884" mem-size="468">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="4">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="260">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="260">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="332" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="332" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="364" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="364" mem-size="4">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="368" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="368" mem-size="4">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="372" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="372" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="380" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="380" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="396" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="396" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="404" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="404" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="420" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="420" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="436" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="436" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="25820" mem-size="1172">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="10">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="25820" mem-size="1172">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="10">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="650">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="650">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="832" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="832" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="912" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="912" mem-size="10">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="922" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="922" mem-size="10">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="932" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="932" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="952" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="952" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="992" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="992" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1012" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1012" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1052" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1052" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1092" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1092" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="0"/>
<Instance label="testDevice2" address="1"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Rabbit_BlockMode.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Rabbit_BlockMode.silecsparam
index d7f5f4a77426942dae129db8efc28a9389c4dc92..023db86ce5c829c5179fe90b891ed3aebc947875 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Rabbit_BlockMode.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Rabbit_BlockMode.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:01.179699"/>
- <Deployment checksum="1525793519"/>
+ <Generation date="2017-06-08 16:28:47.039562"/>
+ <Deployment checksum="308863231"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Rabbit_BlockMode" plc-brand="DIGI" plc-system="Standard-C" plc-model="Rabbit_RCM_4010" protocol="BLOCK_MODE" address="0" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" used-mem="MW0..MW21 / 22 words">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="0" mem-size="44">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="16">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" usedMemory="MW0..MW21 / 22 words">
+ <Acquisition-Block name="hdrBlk" size="14" address="0" mem-size="44">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="16">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="16" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="20" mem-size="16">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="20" mem-size="16">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="36" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="36" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="44" used-mem="MW22..MW1821 / 1800 words">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="44" mem-size="120">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="2">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="44" usedMemory="MW22..MW1821 / 1800 words">
+ <Acquisition-Block name="MyROBlock" size="53" address="44" mem-size="120">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="2">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="2">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="64">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="64">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="2">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="94" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="94" mem-size="2">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="96" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="96" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="98" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="98" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="102" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="102" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="104" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="104" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="108" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="108" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="112" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="112" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="284" mem-size="480">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="8">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="284" mem-size="480">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="8">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="8" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="8" mem-size="8">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="16" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="16" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="24" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="24" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="32" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="32" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="48" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="48" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="64" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="64" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="80" mem-size="256">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="80" mem-size="256">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="8">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="376" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="376" mem-size="8">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="384" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="384" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="392" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="392" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="408" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="408" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="416" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="416" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="432" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="432" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="448" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="448" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="1244" mem-size="1200">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="20">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="1244" mem-size="1200">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="20">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="20" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="20" mem-size="20">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="40" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="40" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="60" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="60" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="80" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="80" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="120" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="120" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="160" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="160" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="200" mem-size="640">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="200" mem-size="640">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="20">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="940" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="940" mem-size="20">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="960" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="960" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="980" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="980" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1020" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1020" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1040" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1040" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1080" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1080" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1120" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1120" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="0"/>
<Instance label="testDevice2" address="1"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Rabbit_DeviceMode.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Rabbit_DeviceMode.silecsparam
index b3728a31a825b9a42938c199ebcbec58a3a1a80c..62778b069921ddc86a1cdd60149b7d0015fb8b57 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Rabbit_DeviceMode.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Rabbit_DeviceMode.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:01.151147"/>
- <Deployment checksum="1525793519"/>
+ <Generation date="2017-06-08 16:28:47.005686"/>
+ <Deployment checksum="308863231"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Rabbit_DeviceMode" plc-brand="DIGI" plc-system="Standard-C" plc-model="Rabbit_RCM_4010" protocol="DEVICE_MODE" address="0" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" used-mem="MW0..MW21 / 22 words">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="0" mem-size="44">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="16">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" usedMemory="MW0..MW21 / 22 words">
+ <Acquisition-Block name="hdrBlk" size="14" address="0" mem-size="44">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="16">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="16" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="20" mem-size="16">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="20" mem-size="16">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="36" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="36" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="44" used-mem="MW22..MW1821 / 1800 words">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="0" mem-size="120">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="2">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="44" usedMemory="MW22..MW1821 / 1800 words">
+ <Acquisition-Block name="MyROBlock" size="53" address="0" mem-size="120">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="2">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="2">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="64">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="64">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="2">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="94" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="94" mem-size="2">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="96" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="96" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="98" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="98" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="102" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="102" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="104" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="104" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="108" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="108" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="112" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="112" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="120" mem-size="480">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="8">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="120" mem-size="480">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="8">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="8" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="8" mem-size="8">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="16" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="16" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="24" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="24" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="32" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="32" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="48" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="48" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="64" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="64" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="80" mem-size="256">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="80" mem-size="256">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="8">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="376" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="376" mem-size="8">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="384" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="384" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="392" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="392" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="408" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="408" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="416" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="416" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="432" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="432" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="448" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="448" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="600" mem-size="1200">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="20">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="600" mem-size="1200">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="20">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="20" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="20" mem-size="20">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="40" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="40" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="60" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="60" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="80" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="80" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="120" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="120" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="160" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="160" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="200" mem-size="640">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="200" mem-size="640">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="20">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="940" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="940" mem-size="20">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="960" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="960" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="980" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="980" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1020" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1020" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1040" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1040" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1080" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1080" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1120" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1120" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="44"/>
<Instance label="testDevice2" address="1844"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Schneider_M340.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Schneider_M340.silecsparam
index cc3ecef63cf0db288def382b9c831b9758759c28..f46258a6a501e76d7cd084f58ea86e6787bb6475 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Schneider_M340.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Schneider_M340.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:01.121096"/>
- <Deployment checksum="1525793519"/>
+ <Generation date="2017-06-08 16:28:46.968837"/>
+ <Deployment checksum="308863231"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Schneider_M340" plc-brand="SCHNEIDER" plc-system="UNITY Pro" plc-model="M340" protocol="BLOCK_MODE" address="0" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" used-mem="MW0..MW21 / 22 words">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="0" mem-size="44">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="16">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" usedMemory="MW0..MW21 / 22 words">
+ <Acquisition-Block name="hdrBlk" size="14" address="0" mem-size="44">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="16">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="16" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="20" mem-size="16">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="20" mem-size="16">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="36" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="36" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="44" used-mem="MW22..MW1801 / 1780 words">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="44" mem-size="124">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="2">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="44" usedMemory="MW22..MW1801 / 1780 words">
+ <Acquisition-Block name="MyROBlock" size="53" address="44" mem-size="124">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="2">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="1">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="64">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="64">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="2">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="94" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="94" mem-size="1">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="96" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="96" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="100" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="100" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="104" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="104" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="108" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="108" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="112" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="112" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="116" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="116" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="292" mem-size="472">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="8">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="292" mem-size="472">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="8">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="8" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="8" mem-size="4">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="12" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="12" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="20" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="20" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="28" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="28" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="44" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="44" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="60" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="60" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="76" mem-size="256">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="76" mem-size="256">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="332" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="332" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="364" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="364" mem-size="8">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="1236" mem-size="1184">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="20">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="1236" mem-size="1184">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="20">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="20" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="20" mem-size="10">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="30" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="30" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="50" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="50" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="72" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="72" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="112" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="112" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="152" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="152" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="192" mem-size="640">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="192" mem-size="640">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="832" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="832" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="912" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="912" mem-size="20">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="932" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="932" mem-size="10">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="942" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="942" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="964" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="964" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1004" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1004" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1024" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1024" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1064" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1064" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1104" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1104" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="0"/>
<Instance label="testDevice2" address="1"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Schneider_PremiumQuantum.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Schneider_PremiumQuantum.silecsparam
index cf3064adb9967d372da7a464a60e4b5ee7fabcd1..6c0873bb380d0b9d046f082c0d72fe1a13aa285a 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Schneider_PremiumQuantum.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Schneider_PremiumQuantum.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:01.091104"/>
- <Deployment checksum="1525793519"/>
+ <Generation date="2017-06-08 16:28:46.931934"/>
+ <Deployment checksum="308863231"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Schneider_PremiumQuantum" plc-brand="SCHNEIDER" plc-system="UNITY Pro" plc-model="Premium" protocol="BLOCK_MODE" address="0" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" used-mem="MW0..MW21 / 22 words">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="0" mem-size="44">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="16">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" usedMemory="MW0..MW21 / 22 words">
+ <Acquisition-Block name="hdrBlk" size="14" address="0" mem-size="44">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="16">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="16" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="20" mem-size="16">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="20" mem-size="16">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="36" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="36" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="44" used-mem="MW22..MW1793 / 1772 words">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="44" mem-size="120">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="2">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="44" usedMemory="MW22..MW1793 / 1772 words">
+ <Acquisition-Block name="MyROBlock" size="53" address="44" mem-size="120">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="2">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="2" mem-size="1">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="4" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="6" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="8" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="12" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="16" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="64">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="20" mem-size="64">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="2">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="94" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="94" mem-size="1">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="96" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="96" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="98" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="98" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="102" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="102" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="104" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="104" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="108" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="108" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="112" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="112" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="284" mem-size="472">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="8">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="284" mem-size="472">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="8">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="8" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="8" mem-size="4">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="12" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="12" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="20" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="20" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="28" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="28" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="44" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="44" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="60" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="60" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="76" mem-size="256">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="76" mem-size="256">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="332" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="332" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="364" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="364" mem-size="8">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="1228" mem-size="1180">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="20">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="1228" mem-size="1180">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="20">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="20" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="20" mem-size="10">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="30" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="30" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="50" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="50" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="70" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="70" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="110" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="110" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="150" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="150" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="190" mem-size="640">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="190" mem-size="640">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="830" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="830" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="910" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="910" mem-size="20">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="0"/>
<Instance label="testDevice2" address="1"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Siemens_Step7Block.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Siemens_Step7Block.silecsparam
index ccde8059445ef29d35c1c4a9da04b3c5f8e125cc..857d51b7073f220520b8563a439be31a5c55d5e8 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Siemens_Step7Block.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Siemens_Step7Block.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:00.914936"/>
- <Deployment checksum="1525793519"/>
+ <Generation date="2017-06-08 16:28:46.708946"/>
+ <Deployment checksum="308863231"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Siemens_Step7Block" plc-brand="SIEMENS" plc-system="STEP-7" plc-model="SIMATIC_S7-300" protocol="DEVICE_MODE" address="0" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" used-mem="DB0..DB0 / 48 bytes">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="0" mem-size="48">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="18">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" usedMemory="DB0..DB0 / 48 bytes">
+ <Acquisition-Block name="hdrBlk" size="14" address="0" mem-size="48">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="18">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="18" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="18" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="22" mem-size="18">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="22" mem-size="18">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="40" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="40" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="1" used-mem="DB1..DB2 / 3540 bytes">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="0" mem-size="118">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="1">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="1" usedMemory="DB1..DB2 / 3540 bytes">
+ <Acquisition-Block name="MyROBlock" size="53" address="0" mem-size="118">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="1">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="1" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="1" mem-size="1">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="2" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="2" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="4" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="6" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="6" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="10" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="10" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="14" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="14" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="18" mem-size="66">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="18" mem-size="66">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="1">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="93" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="93" mem-size="1">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="94" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="94" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="96" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="96" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="100" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="100" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="102" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="102" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="106" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="106" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="110" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="110" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="118" mem-size="472">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="4">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="118" mem-size="472">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="4">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="264">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="264">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="4">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="590" mem-size="1180">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="10">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="590" mem-size="1180">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="10">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="660">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="660">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="10">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="1"/>
<Instance label="testDevice2" address="2"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Siemens_Step7Device.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Siemens_Step7Device.silecsparam
index d210b157b323a9c42f09f9ba7a822850cfd39b84..6ae45a184b3224eb6bb845ce28e4864d10633834 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Siemens_Step7Device.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Siemens_Step7Device.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:00.942946"/>
- <Deployment checksum="1525793519"/>
+ <Generation date="2017-06-08 16:28:46.747628"/>
+ <Deployment checksum="308863231"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Siemens_Step7Device" plc-brand="SIEMENS" plc-system="STEP-7" plc-model="SIMATIC_S7-300" protocol="BLOCK_MODE" address="0" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" used-mem="DB0..DB0 / 48 bytes">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="0" mem-size="48">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="18">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" usedMemory="DB0..DB0 / 48 bytes">
+ <Acquisition-Block name="hdrBlk" size="14" address="0" mem-size="48">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="18">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="18" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="18" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="22" mem-size="18">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="22" mem-size="18">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="40" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="40" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="1" used-mem="DB1..DB3 / 3540 bytes">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="1" mem-size="118">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="1">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="1" usedMemory="DB1..DB3 / 3540 bytes">
+ <Acquisition-Block name="MyROBlock" size="53" address="1" mem-size="118">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="1">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="1" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="1" mem-size="1">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="2" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="2" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="4" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="6" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="6" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="10" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="10" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="14" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="14" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="18" mem-size="66">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="18" mem-size="66">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="1">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="93" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="93" mem-size="1">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="94" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="94" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="96" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="96" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="100" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="100" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="102" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="102" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="106" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="106" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="110" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="110" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="2" mem-size="472">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="4">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="2" mem-size="472">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="4">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="264">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="264">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="4">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="3" mem-size="1180">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="10">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="3" mem-size="1180">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="10">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="660">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="660">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="10">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="0"/>
<Instance label="testDevice2" address="1"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Siemens_TiaBlock.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Siemens_TiaBlock.silecsparam
index 0e4b97f762e8ebed349570873d5dfc38f635efcd..cc3461d67109613d6fd6b18277394b378661a432 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Siemens_TiaBlock.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Siemens_TiaBlock.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:00.881636"/>
- <Deployment checksum="1525793519"/>
+ <Generation date="2017-06-08 16:28:46.675405"/>
+ <Deployment checksum="308863231"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Siemens_TiaBlock" plc-brand="SIEMENS" plc-system="TIA-PORTAL" plc-model="SIMATIC_S7-300" protocol="BLOCK_MODE" address="0" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" used-mem="DB0..DB0 / 48 bytes">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="0" mem-size="48">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="18">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" usedMemory="DB0..DB0 / 48 bytes">
+ <Acquisition-Block name="hdrBlk" size="14" address="0" mem-size="48">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="18">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="18" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="18" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="22" mem-size="18">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="22" mem-size="18">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="40" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="40" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="1" used-mem="DB1..DB3 / 3540 bytes">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="1" mem-size="118">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="1">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="1" usedMemory="DB1..DB3 / 3540 bytes">
+ <Acquisition-Block name="MyROBlock" size="53" address="1" mem-size="118">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="1">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="1" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="1" mem-size="1">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="2" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="2" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="4" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="6" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="6" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="10" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="10" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="14" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="14" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="18" mem-size="66">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="18" mem-size="66">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="1">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="93" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="93" mem-size="1">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="94" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="94" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="96" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="96" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="100" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="100" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="102" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="102" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="106" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="106" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="110" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="110" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="2" mem-size="472">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="4">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="2" mem-size="472">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="4">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="264">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="264">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="4">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="3" mem-size="1180">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="10">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="3" mem-size="1180">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="10">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="660">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="660">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="10">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="0"/>
<Instance label="testDevice2" address="1"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/client/Siemens_TiaDevice.silecsparam b/silecs-codegen/src/xml/test/generated_correct/client/Siemens_TiaDevice.silecsparam
index bafa3a01951047f5379f7f6fe686e2a6009764d9..7488b8716434fac183a6d719522514d301141e27 100644
--- a/silecs-codegen/src/xml/test/generated_correct/client/Siemens_TiaDevice.silecsparam
+++ b/silecs-codegen/src/xml/test/generated_correct/client/Siemens_TiaDevice.silecsparam
@@ -2,187 +2,187 @@
<SILECS-Param silecs-version="DEV">
<Mapping-Info>
<Owner user-login="schwinn"/>
- <Generation date="2017-06-06 16:10:00.846238"/>
- <Deployment checksum="1525793519"/>
+ <Generation date="2017-06-08 16:28:46.637256"/>
+ <Deployment checksum="308863231"/>
</Mapping-Info>
<SILECS-Mapping plc-name="Siemens_TiaDevice" plc-brand="SIEMENS" plc-system="TIA-PORTAL" plc-model="SIMATIC_S7-300" protocol="DEVICE_MODE" address="0" domain="NotUsed" used-mem="TODO">
- <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" used-mem="DB0..DB0 / 48 bytes">
- <Block name="hdrBlk" mode="READ-ONLY" size="14" address="0" mem-size="48">
- <Register name="_version" synchro="MASTER" size="1" address="0" mem-size="18">
+ <SILECS-Class name="SilecsHeader" version="1.0.0" address="0" usedMemory="DB0..DB0 / 48 bytes">
+ <Acquisition-Block name="hdrBlk" size="14" address="0" mem-size="48">
+ <Acquisition-Register name="_version" size="1" address="0" mem-size="18">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER" size="4" address="18" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum" size="4" address="18" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="_user" synchro="MASTER" size="1" address="22" mem-size="18">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user" size="1" address="22" mem-size="18">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER" size="8" address="40" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date" size="8" address="40" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
<Instance label="SilecsHeader" address="0"/>
</SILECS-Class>
- <SILECS-Class name="AllTypes" version="0.1.0" address="1" used-mem="DB1..DB2 / 3540 bytes">
- <Block name="MyROBlock" mode="READ-ONLY" size="53" address="0" mem-size="118">
- <Register name="RO_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="1">
+ <SILECS-Class name="AllTypes" version="0.1.0" address="1" usedMemory="DB1..DB2 / 3540 bytes">
+ <Acquisition-Block name="MyROBlock" size="53" address="0" mem-size="118">
+ <Acquisition-Register name="RO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="1">
<scalar format="int8"/>
- </Register>
- <Register name="RO_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="1" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint8" generateFesaValueItem="true" fesaFieldName="RO_uint8_fesa" size="1" address="1" mem-size="1">
<scalar format="uint8"/>
- </Register>
- <Register name="RO_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="2" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int16" generateFesaValueItem="true" fesaFieldName="RO_int16_fesa" size="2" address="2" mem-size="2">
<scalar format="int16"/>
- </Register>
- <Register name="RO_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="4" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint16" generateFesaValueItem="true" fesaFieldName="RO_uint16_fesa" size="2" address="4" mem-size="2">
<scalar format="uint16"/>
- </Register>
- <Register name="RO_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="6" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int32" generateFesaValueItem="true" fesaFieldName="RO_int32_fesa" size="4" address="6" mem-size="4">
<scalar format="int32"/>
- </Register>
- <Register name="RO_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="10" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_uint32" generateFesaValueItem="true" fesaFieldName="RO_uint32_fesa" size="4" address="10" mem-size="4">
<scalar format="uint32"/>
- </Register>
- <Register name="RO_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="14" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_float32" generateFesaValueItem="true" fesaFieldName="RO_float32_fesa" size="4" address="14" mem-size="4">
<scalar format="float32"/>
- </Register>
- <Register name="RO_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="18" mem-size="66">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_string" generateFesaValueItem="true" fesaFieldName="RO_string_fesa" size="1" address="18" mem-size="66">
<string string-length="64" format="string"/>
- </Register>
- <Register name="RO_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_date" generateFesaValueItem="true" fesaFieldName="RO_date_fesa" size="8" address="84" mem-size="8">
<scalar format="date"/>
- </Register>
- <Register name="RO_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_char" generateFesaValueItem="true" fesaFieldName="RO_char_fesa" size="1" address="92" mem-size="1">
<scalar format="char"/>
- </Register>
- <Register name="RO_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="93" mem-size="1">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_byte" generateFesaValueItem="true" fesaFieldName="RO_byte_fesa" size="1" address="93" mem-size="1">
<scalar format="byte"/>
- </Register>
- <Register name="RO_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="94" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_word" generateFesaValueItem="true" fesaFieldName="RO_word_fesa" size="2" address="94" mem-size="2">
<scalar format="word"/>
- </Register>
- <Register name="RO_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="96" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dword" generateFesaValueItem="true" fesaFieldName="RO_dword_fesa" size="4" address="96" mem-size="4">
<scalar format="dword"/>
- </Register>
- <Register name="RO_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="100" mem-size="2">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_int" generateFesaValueItem="true" fesaFieldName="RO_int_fesa" size="2" address="100" mem-size="2">
<scalar format="int"/>
- </Register>
- <Register name="RO_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="102" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dint" generateFesaValueItem="true" fesaFieldName="RO_dint_fesa" size="4" address="102" mem-size="4">
<scalar format="dint"/>
- </Register>
- <Register name="RO_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="106" mem-size="4">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_real" generateFesaValueItem="true" fesaFieldName="RO_real_fesa" size="4" address="106" mem-size="4">
<scalar format="real"/>
- </Register>
- <Register name="RO_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="110" mem-size="8">
+ </Acquisition-Register>
+ <Acquisition-Register name="RO_dt" generateFesaValueItem="true" fesaFieldName="RO_dt_fesa" size="8" address="110" mem-size="8">
<scalar format="dt"/>
- </Register>
- </Block>
- <Block name="MyRWBlock" mode="READ-WRITE" size="212" address="118" mem-size="472">
- <Register name="RW_int8" synchro="MASTER" generateFesaValueItem="true" size="1" address="0" mem-size="4">
+ </Acquisition-Register>
+ </Acquisition-Block>
+ <Setting-Block name="MyRWBlock" size="212" address="118" mem-size="472">
+ <Volatile-Register name="RW_int8" generateFesaValueItem="true" size="1" address="0" mem-size="4">
<array2D dim1="2" dim2="2" format="int8"/>
- </Register>
- <Register name="RW_uint8" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint8" generateFesaValueItem="true" fesaFieldName="RW_uint8_fesa" size="1" address="4" mem-size="4">
<array2D dim1="2" dim2="2" format="uint8"/>
- </Register>
- <Register name="RW_int16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int16" generateFesaValueItem="true" fesaFieldName="RW_int16_fesa" size="2" address="8" mem-size="8">
<array2D dim1="2" dim2="2" format="int16"/>
- </Register>
- <Register name="RW_uint16" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint16" generateFesaValueItem="true" fesaFieldName="RW_uint16_fesa" size="2" address="16" mem-size="8">
<array2D dim1="2" dim2="2" format="uint16"/>
- </Register>
- <Register name="RW_int32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int32" generateFesaValueItem="true" fesaFieldName="RW_int32_fesa" size="4" address="24" mem-size="16">
<array2D dim1="2" dim2="2" format="int32"/>
- </Register>
- <Register name="RW_uint32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_uint32" generateFesaValueItem="true" fesaFieldName="RW_uint32_fesa" size="4" address="40" mem-size="16">
<array2D dim1="2" dim2="2" format="uint32"/>
- </Register>
- <Register name="RW_float32" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_float32" generateFesaValueItem="true" fesaFieldName="RW_float32_fesa" size="4" address="56" mem-size="16">
<array2D dim1="2" dim2="2" format="float32"/>
- </Register>
- <Register name="RW_string" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="264">
+ </Volatile-Register>
+ <Volatile-Register name="RW_string" generateFesaValueItem="true" fesaFieldName="RW_string_fesa" size="1" address="72" mem-size="264">
<stringArray2D dim1="2" dim2="2" string-length="64" format="string"/>
- </Register>
- <Register name="RW_date" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_date" generateFesaValueItem="true" fesaFieldName="RW_date_fesa" size="8" address="336" mem-size="32">
<array2D dim1="2" dim2="2" format="date"/>
- </Register>
- <Register name="RW_char" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_char" generateFesaValueItem="true" fesaFieldName="RW_char_fesa" size="1" address="368" mem-size="4">
<array2D dim1="2" dim2="2" format="char"/>
- </Register>
- <Register name="RW_byte" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
+ </Volatile-Register>
+ <Volatile-Register name="RW_byte" generateFesaValueItem="true" fesaFieldName="RW_byte_fesa" size="1" address="372" mem-size="4">
<array2D dim1="2" dim2="2" format="byte"/>
- </Register>
- <Register name="RW_word" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_word" generateFesaValueItem="true" fesaFieldName="RW_word_fesa" size="2" address="376" mem-size="8">
<array2D dim1="2" dim2="2" format="word"/>
- </Register>
- <Register name="RW_dword" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dword" generateFesaValueItem="true" fesaFieldName="RW_dword_fesa" size="4" address="384" mem-size="16">
<array2D dim1="2" dim2="2" format="dword"/>
- </Register>
- <Register name="RW_int" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
+ </Volatile-Register>
+ <Volatile-Register name="RW_int" generateFesaValueItem="true" fesaFieldName="RW_int_fesa" size="2" address="400" mem-size="8">
<array2D dim1="2" dim2="2" format="int"/>
- </Register>
- <Register name="RW_dint" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dint" generateFesaValueItem="true" fesaFieldName="RW_dint_fesa" size="4" address="408" mem-size="16">
<array2D dim1="2" dim2="2" format="dint"/>
- </Register>
- <Register name="RW_real" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
+ </Volatile-Register>
+ <Volatile-Register name="RW_real" generateFesaValueItem="true" fesaFieldName="RW_real_fesa" size="4" address="424" mem-size="16">
<array2D dim1="2" dim2="2" format="real"/>
- </Register>
- <Register name="RW_dt" synchro="MASTER" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
+ </Volatile-Register>
+ <Volatile-Register name="RW_dt" generateFesaValueItem="true" fesaFieldName="RW_dt_fesa" size="8" address="440" mem-size="32">
<array2D dim1="2" dim2="2" format="dt"/>
- </Register>
- </Block>
- <Block name="MyWOBlock" mode="WRITE-ONLY" size="530" address="590" mem-size="1180">
- <Register name="WO_int8" synchro="SLAVE" generateFesaValueItem="true" size="1" address="0" mem-size="10">
+ </Volatile-Register>
+ </Setting-Block>
+ <Command-Block name="MyWOBlock" size="530" address="590" mem-size="1180">
+ <Setting-Register name="WO_int8" generateFesaValueItem="true" size="1" address="0" mem-size="10">
<array dim="10" format="int8"/>
- </Register>
- <Register name="WO_uint8" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_uint8" generateFesaValueItem="true" fesaFieldName="WO_uint8_fesa" size="1" address="10" mem-size="10">
<array dim="10" format="uint8"/>
- </Register>
- <Register name="WO_int16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int16" generateFesaValueItem="true" fesaFieldName="WO_int16_fesa" size="2" address="20" mem-size="20">
<array dim="10" format="int16"/>
- </Register>
- <Register name="WO_uint16" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_uint16" generateFesaValueItem="true" fesaFieldName="WO_uint16_fesa" size="2" address="40" mem-size="20">
<array dim="10" format="uint16"/>
- </Register>
- <Register name="WO_int32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_int32" generateFesaValueItem="true" fesaFieldName="WO_int32_fesa" size="4" address="60" mem-size="40">
<array dim="10" format="int32"/>
- </Register>
- <Register name="WO_uint32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_uint32" generateFesaValueItem="true" fesaFieldName="WO_uint32_fesa" size="4" address="100" mem-size="40">
<array dim="10" format="uint32"/>
- </Register>
- <Register name="WO_float32" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_float32" generateFesaValueItem="true" fesaFieldName="WO_float32_fesa" size="4" address="140" mem-size="40">
<array dim="10" format="float32"/>
- </Register>
- <Register name="WO_string" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="660">
+ </Setting-Register>
+ <Setting-Register name="WO_string" generateFesaValueItem="true" fesaFieldName="WO_string_fesa" size="1" address="180" mem-size="660">
<stringArray dim="10" string-length="64" format="string"/>
- </Register>
- <Register name="WO_date" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_date" generateFesaValueItem="true" fesaFieldName="WO_date_fesa" size="8" address="840" mem-size="80">
<array dim="10" format="date"/>
- </Register>
- <Register name="WO_char" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_char" generateFesaValueItem="true" fesaFieldName="WO_char_fesa" size="1" address="920" mem-size="10">
<array dim="10" format="char"/>
- </Register>
- <Register name="WO_byte" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
+ </Setting-Register>
+ <Setting-Register name="WO_byte" generateFesaValueItem="true" fesaFieldName="WO_byte_fesa" size="1" address="930" mem-size="10">
<array dim="10" format="byte"/>
- </Register>
- <Register name="WO_word" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_word" generateFesaValueItem="true" fesaFieldName="WO_word_fesa" size="2" address="940" mem-size="20">
<array dim="10" format="word"/>
- </Register>
- <Register name="WO_dword" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dword" generateFesaValueItem="true" fesaFieldName="WO_dword_fesa" size="4" address="960" mem-size="40">
<array dim="10" format="dword"/>
- </Register>
- <Register name="WO_int" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
+ </Setting-Register>
+ <Setting-Register name="WO_int" generateFesaValueItem="true" fesaFieldName="WO_int_fesa" size="2" address="1000" mem-size="20">
<array dim="10" format="int"/>
- </Register>
- <Register name="WO_dint" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_dint" generateFesaValueItem="true" fesaFieldName="WO_dint_fesa" size="4" address="1020" mem-size="40">
<array dim="10" format="dint"/>
- </Register>
- <Register name="WO_real" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
+ </Setting-Register>
+ <Setting-Register name="WO_real" generateFesaValueItem="true" fesaFieldName="WO_real_fesa" size="4" address="1060" mem-size="40">
<array dim="10" format="real"/>
- </Register>
- <Register name="WO_dt" synchro="SLAVE" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
+ </Setting-Register>
+ <Setting-Register name="WO_dt" generateFesaValueItem="true" fesaFieldName="WO_dt_fesa" size="8" address="1100" mem-size="80">
<array dim="10" format="dt"/>
- </Register>
- </Block>
+ </Setting-Register>
+ </Command-Block>
<Instance label="testDevice1" address="1"/>
<Instance label="testDevice2" address="2"/>
</SILECS-Class>
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_BC9020.exp b/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_BC9020.exp
index 9d6b4483663c66175cb1b81a057989090284d3cf..68210c9c6172ef0e3928f3b621189cfde9ddef5e 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_BC9020.exp
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_BC9020.exp
@@ -11,13 +11,13 @@ VAR_GLOBAL
_version_a781_SilecsHeader AT %MW0: STRING(16):= DEV;
(*SilecsHeader/SilecsHeader/hdrBlk *)
- _checksum_a781_SilecsHeader AT %MW9: DWORD:= 3184721915;
+ _checksum_a781_SilecsHeader AT %MW9: DWORD:= 1037751963;
(*SilecsHeader/SilecsHeader/hdrBlk *)
_user_a781_SilecsHeader AT %MW11: STRING(16):= 'schwinn';
(*SilecsHeader/SilecsHeader/hdrBlk *)
- _date_a781_SilecsHeader AT %MW20: DT:= DT#2017-6-6-16:14:51;
+ _date_a781_SilecsHeader AT %MW20: DT:= DT#2017-6-8-16:38:3;
(*AllTypes/testDevice1/MyROBlock *)
RO_int8_a583_testDevice1 AT %MW24: SINT;
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_CX9020.exp b/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_CX9020.exp
index ca7f7a28e2249eefe282fe85892183eda49b2262..d6fca4ca68637ac60952990e7de60bbdeb1bfe47 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_CX9020.exp
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_CX9020.exp
@@ -11,13 +11,13 @@ VAR_GLOBAL
_version_a781_SilecsHeader AT %MW0: STRING(16):= DEV;
(*SilecsHeader/SilecsHeader/hdrBlk *)
- _checksum_a781_SilecsHeader AT %MW20: DWORD:= 656547166;
+ _checksum_a781_SilecsHeader AT %MW20: DWORD:= 2754857673;
(*SilecsHeader/SilecsHeader/hdrBlk *)
_user_a781_SilecsHeader AT %MW24: STRING(16):= 'schwinn';
(*SilecsHeader/SilecsHeader/hdrBlk *)
- _date_a781_SilecsHeader AT %MW44: DT:= DT#2017-6-6-16:14:51;
+ _date_a781_SilecsHeader AT %MW44: DT:= DT#2017-6-8-16:38:3;
(*AllTypes/testDevice1/MyROBlock *)
RO_int8_a583_testDevice1 AT %MW52: SINT;
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_BlockMode.h b/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_BlockMode.h
index 655863d17d0c4be5a6249107134b4cc2c39dbc90..a5857abf63b31fa1699601a15005f03e69f4beeb 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_BlockMode.h
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_BlockMode.h
@@ -183,13 +183,13 @@ int SILECS_init()
strcpy((unsigned char *)silecsData.data.SilecsHeader_hdrBlk.device[0]._version, "SILECS_DEV");
/* Silecs checksum initialization */
- silecsData.data.SilecsHeader_hdrBlk.device[0]._checksum = 1525793519;
+ silecsData.data.SilecsHeader_hdrBlk.device[0]._checksum = 308863231;
/* Silecs user initialization */
strcpy((unsigned char *)silecsData.data.SilecsHeader_hdrBlk.device[0]._user, "schwinn");
/* Silecs date initialization */
- SILECS_set_dt(1,51,14,16,6,6,2017,&silecsData.data.SilecsHeader_hdrBlk.device[0]._date);
+ SILECS_set_dt(3,3,38,16,8,6,2017,&silecsData.data.SilecsHeader_hdrBlk.device[0]._date);
}
/*
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_DeviceMode.h b/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_DeviceMode.h
index 3c6d1da52beed0b8bb6eb3779f408fd6d1ea89ff..95491d747e28f33f3618ed1e6afda28e4a3fe2f8 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_DeviceMode.h
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_DeviceMode.h
@@ -176,13 +176,13 @@ int SILECS_init()
strcpy((unsigned char *)silecsData.data.SilecsHeader_device[0].hdrBlk._version, "SILECS_DEV");
/* Silecs checksum initialization */
- silecsData.data.SilecsHeader_device[0].hdrBlk._checksum = 1525793519;
+ silecsData.data.SilecsHeader_device[0].hdrBlk._checksum = 308863231;
/* Silecs user initialization */
strcpy((unsigned char *)silecsData.data.SilecsHeader_device[0].hdrBlk._user, "schwinn");
/* Silecs date initialization */
- SILECS_set_dt(1,51,14,16,6,6,2017,&silecsData.data.SilecsHeader_device[0].hdrBlk._date);
+ SILECS_set_dt(3,3,38,16,8,6,2017,&silecsData.data.SilecsHeader_device[0].hdrBlk._date);
}
/*
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_M340.xsy b/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_M340.xsy
index 6d8d7b2eef0221f4008124b8d72dcef7f2beb4f0..354b71b039da276fb50252fe7a4abfdbdeb1c86f 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_M340.xsy
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_M340.xsy
@@ -5,7 +5,7 @@
<comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
</variables>
<variables name="_checksum_a781_SilecsHeader" typeName="DWORD" topologicalAddress="%MW8">
- <variableInit value="1525793519"/>
+ <variableInit value="308863231"/>
<comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
</variables>
<variables name="_user_a781_SilecsHeader" typeName="STRING[16]" topologicalAddress="%MW10">
@@ -13,7 +13,7 @@
<comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
</variables>
<variables name="_date_a781_SilecsHeader" typeName="DT" topologicalAddress="%MW18">
- <variableInit value="DT#2017-6-6-16:14:51"/>
+ <variableInit value="DT#2017-6-8-16:38:3"/>
<comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
</variables>
<variables name="RO_int8_a583_testDevice1" typeName="WORD" topologicalAddress="%MW22">
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_PremiumQuantum.xsy b/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_PremiumQuantum.xsy
index 141da6b77d229bd68a8a5d63ed5133c240f39f11..724ac1040422d4352f637eb1721396fd64f9953d 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_PremiumQuantum.xsy
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_PremiumQuantum.xsy
@@ -5,7 +5,7 @@
<comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
</variables>
<variables name="_checksum_a781_SilecsHeader" typeName="DWORD" topologicalAddress="%MW8">
- <variableInit value="1525793519"/>
+ <variableInit value="308863231"/>
<comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
</variables>
<variables name="_user_a781_SilecsHeader" typeName="STRING[16]" topologicalAddress="%MW10">
@@ -13,7 +13,7 @@
<comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
</variables>
<variables name="_date_a781_SilecsHeader" typeName="DT" topologicalAddress="%MW18">
- <variableInit value="DT#2017-6-6-16:14:51"/>
+ <variableInit value="DT#2017-6-8-16:38:3"/>
<comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
</variables>
<variables name="RO_int8_a583_testDevice1" typeName="WORD" topologicalAddress="%MW22">
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Block.scl b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Block.scl
index 2291db5ec1f1a6791c40613462f40feb83c072cf..cdf21c5539ee5544c6f7d45f6889a9204def106f 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Block.scl
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Block.scl
@@ -8,9 +8,9 @@ FAMILY: SILECS
NAME: UDTB
STRUCT
_version: STRING[16] := 'SILECS_DEV';
- _checksum: DWORD := DW#16#5af1c2ef;
+ _checksum: DWORD := DW#16#1268e0ff;
_user: STRING[16] := 'schwinn';
- _date: DT := DT#2017-6-6-16:14:50;
+ _date: DT := DT#2017-6-8-16:38:3;
END_STRUCT;
END_TYPE
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Device.scl b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Device.scl
index f1c0a397fec4e2f87c7ca9384dbc740260718423..142d3f927c49e11f6b209ddf811f22de340af82b 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Device.scl
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Device.scl
@@ -8,9 +8,9 @@ FAMILY: SILECS
NAME: UDTB
STRUCT
_version: STRING[16] := 'SILECS_DEV';
- _checksum: DWORD := DW#16#5af1c2ef;
+ _checksum: DWORD := DW#16#1268e0ff;
_user: STRING[16] := 'schwinn';
- _date: DT := DT#2017-6-6-16:14:50;
+ _date: DT := DT#2017-6-8-16:38:3;
END_STRUCT;
END_TYPE
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaBlock.scl b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaBlock.scl
index dd180fc933721d80cd1591f6358986d9030c1122..f91e96353f6332370d78024ced64683280ae584c 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaBlock.scl
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaBlock.scl
@@ -8,9 +8,9 @@ FAMILY: SILECS
NAME: UDTB
STRUCT
_version: STRING[16] := 'SILECS_DEV';
- _checksum: DWORD := DW#16#5af1c2ef;
+ _checksum: DWORD := DW#16#1268e0ff;
_user: STRING[16] := 'schwinn';
- _date: DT := DT#2017-6-6-16:14:50;
+ _date: DT := DT#2017-6-8-16:38:3;
END_STRUCT;
END_TYPE
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaDevice.scl b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaDevice.scl
index b796ba6d272aecfbfde4dc57942e6f962f7327ec..b83ccff3aab84110589b86ee4f2f7354a3d02623 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaDevice.scl
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaDevice.scl
@@ -8,9 +8,9 @@ FAMILY: SILECS
NAME: UDTB
STRUCT
_version: STRING[16] := 'SILECS_DEV';
- _checksum: DWORD := DW#16#5af1c2ef;
+ _checksum: DWORD := DW#16#1268e0ff;
_user: STRING[16] := 'schwinn';
- _date: DT := DT#2017-6-6-16:14:50;
+ _date: DT := DT#2017-6-8-16:38:3;
END_STRUCT;
END_TYPE
diff --git a/silecs-codegen/src/xml/xmltemplate.py b/silecs-codegen/src/xml/xmltemplate.py
index af23ae15f65150da52987d9da0bffb78c0b82dc5..b09e09f18a9ed06c70bd884c2cf363a244604c44 100644
--- a/silecs-codegen/src/xml/xmltemplate.py
+++ b/silecs-codegen/src/xml/xmltemplate.py
@@ -27,20 +27,20 @@ silecsHeader = """<?xml version="1.0" encoding="UTF-8"?>
<Editor user-login="%s"/>
</Information>
<SILECS-Class domain="TEST" name="SilecsHeader" version="1.0.0">
- <Block mode="READ-ONLY" name="hdrBlk">
- <Register name="_version" synchro="MASTER">
+ <Acquisition-Block name="hdrBlk">
+ <Acquisition-Register name="_version">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_checksum" synchro="MASTER">
+ </Acquisition-Register>
+ <Acquisition-Register name="_checksum">
<scalar format="uint32" />
- </Register>
- <Register name="_user" synchro="MASTER">
+ </Acquisition-Register>
+ <Acquisition-Register name="_user">
<string string-length="16" format="string"/>
- </Register>
- <Register name="_date" synchro="MASTER">
+ </Acquisition-Register>
+ <Acquisition-Register name="_date">
<scalar format="dt" />
- </Register>
- </Block>
+ </Acquisition-Register>
+ </Acquisition-Block>
</SILECS-Class>
</SILECS-Design>
"""
@@ -61,9 +61,11 @@ designTemplate = """<?xml version="1.0" encoding="UTF-8"?>
<Editor user-login="%s"/>
</Information>
<SILECS-Class name="%s" version="0.1.0" domain="OPERATIONAL" >
- <Block name="MyBlock" mode="READ-ONLY" generateFesaProperty="true">
- <Register name="myRegister" format="int32" synchro="MASTER" generateFesaValueItem="true" />
- </Block>
+ <Acquisition-Block name="MyBlock" generateFesaProperty="true">
+ <Acquisition-Register name="myRegister" generateFesaValueItem="true">
+ <scalar format="int32"/>
+ </Acquisition-Register>
+ </Acquisition-Block>
</SILECS-Class>
</SILECS-Design>
"""
diff --git a/silecs-model/src/xml/DesignSchema.xsd b/silecs-model/src/xml/DesignSchema.xsd
index 02be0f41ffd1220d0961eb831f314ff4a8c03814..1fa8455298619adc785ecae719836bae0dc2218d 100644
--- a/silecs-model/src/xml/DesignSchema.xsd
+++ b/silecs-model/src/xml/DesignSchema.xsd
@@ -151,22 +151,12 @@ along with this program. If not, see http://www.gnu.org/licenses/.-->
</xs:attribute>
</xs:complexType>
</xs:element>
- <xs:element name="RealTime" minOccurs="0">
- <xs:complexType>
- <xs:attribute name="fesaRTActionName" type="BlockNameType" use="required">
- <xs:annotation>
- <xs:appinfo>Defines the name of the generated Fesa-RT-Action.</xs:appinfo>
- </xs:annotation>
- </xs:attribute>
- </xs:complexType>
- </xs:element>
</xs:sequence>
</xs:complexType>
<xs:complexType name="BlockType">
<xs:sequence>
<xs:element name="Description" type="xs:string" minOccurs="0"/>
- <xs:element name="Fesa-Codegen-Config" type="FesaBlockCodegenConfigType" minOccurs="0"/>
</xs:sequence>
<xs:attribute name="name" type="BlockNameType" use="required">
<xs:annotation>
@@ -176,20 +166,32 @@ along with this program. If not, see http://www.gnu.org/licenses/.-->
</xs:appinfo>
</xs:annotation>
</xs:attribute>
+ <xs:attribute name="generateFesaProperty" type="xs:boolean" use="required">
+ <xs:annotation>
+ <xs:appinfo>
+ Defines if the code-generation will generate a FESA-Property and the related Actions/Events/etc for this block
+ </xs:appinfo>
+ </xs:annotation>
+ </xs:attribute>
+ <xs:attribute name="fesaPropertyName" type="BlockNameType" use="optional">
+ <xs:annotation>
+ <xs:appinfo>Defines the name of the generated Fesa-Property. If not set, the Blockname will be used.</xs:appinfo>
+ </xs:annotation>
+ </xs:attribute>
</xs:complexType>
<xs:complexType name="Setting-BlockType">
<xs:complexContent>
<xs:extension base="BlockType">
<xs:sequence>
- <xs:element name="Setting-Register" type="Setting-RegisterType" minOccurs="0" maxOccurs="unbounded">
+ <xs:element name="Setting-Register" type="RegisterType" minOccurs="0" maxOccurs="unbounded">
<xs:annotation>
<xs:appinfo>
<doc>PLC Register which can be setted and read back by Silecs. The PLC should not modify it's value.</doc>
</xs:appinfo>
</xs:annotation>
</xs:element>
- <xs:element name="Volatile-Register" type="Volatile-RegisterType" minOccurs="0" maxOccurs="unbounded">
+ <xs:element name="Volatile-Register" type="RegisterType" minOccurs="0" maxOccurs="unbounded">
<xs:annotation>
<xs:appinfo>
<doc>PLC Register which can be set by both, Silecs and the PLC</doc>
@@ -205,20 +207,13 @@ along with this program. If not, see http://www.gnu.org/licenses/.-->
<xs:complexContent>
<xs:extension base="BlockType">
<xs:sequence>
- <xs:element name="Acquisition-Register" type="Acquisition-RegisterType" minOccurs="0" maxOccurs="unbounded">
+ <xs:element name="Acquisition-Register" type="RegisterType" minOccurs="0" maxOccurs="unbounded">
<xs:annotation>
<xs:appinfo>
<doc>PLC Register which is only read out by Silecs</doc>
</xs:appinfo>
</xs:annotation>
</xs:element>
- <xs:element name="Volatile-Register" type="Volatile-RegisterType" minOccurs="0" maxOccurs="unbounded">
- <xs:annotation>
- <xs:appinfo>
- <doc>PLC Register which can be set by both, Silecs and the PLC</doc>
- </xs:appinfo>
- </xs:annotation>
- </xs:element>
</xs:sequence>
</xs:extension>
</xs:complexContent>
@@ -228,20 +223,13 @@ along with this program. If not, see http://www.gnu.org/licenses/.-->
<xs:complexContent>
<xs:extension base="BlockType">
<xs:sequence>
- <xs:element name="Setting-Register" type="Setting-RegisterType" minOccurs="0" maxOccurs="unbounded">
+ <xs:element name="Setting-Register" type="RegisterType" minOccurs="0" maxOccurs="unbounded">
<xs:annotation>
<xs:appinfo>
<doc>PLC Register which can be setted by Silecs. The PLC should not modify it's value.</doc>
</xs:appinfo>
</xs:annotation>
</xs:element>
- <xs:element name="Volatile-Register" type="Volatile-RegisterType" minOccurs="0" maxOccurs="unbounded">
- <xs:annotation>
- <xs:appinfo>
- <doc>PLC Register which can be set by both, Silecs and the PLC</doc>
- </xs:appinfo>
- </xs:annotation>
- </xs:element>
</xs:sequence>
</xs:extension>
</xs:complexContent>
@@ -313,76 +301,58 @@ along with this program. If not, see http://www.gnu.org/licenses/.-->
</xs:annotation>
</xs:attribute>
</xs:complexType>
-
-<xs:complexType name="Acquisition-RegisterType">
- <xs:complexContent>
- <xs:extension base="RegisterType">
- </xs:extension>
- </xs:complexContent>
-</xs:complexType>
-<xs:complexType name="Setting-RegisterType">
- <xs:complexContent>
- <xs:extension base="RegisterType">
- </xs:extension>
- </xs:complexContent>
-</xs:complexType>
-<xs:complexType name="Volatile-RegisterType">
- <xs:complexContent>
- <xs:extension base="RegisterType">
- </xs:extension>
- </xs:complexContent>
-</xs:complexType>
- <xs:simpleType name="BlockNameType">
- <xs:restriction base="xs:string">
- <xs:minLength value="1"/>
- <xs:maxLength value="30"/>
- <!-- Siemens Support bezüglich der maximalen Zeichenlänge für PLC- Tags : S7-300/1200/1500er bei 128 Zeichen -->
- <!-- FESA PropertyNames have max. 30 characters. Since For each Block a prop is generated, we have to use this limit -->
- <xs:pattern value="[_A-Za-z]+[_A-Za-z0-9]*"/>
- </xs:restriction>
- </xs:simpleType>
- <xs:simpleType name="RegisterNameType">
- <xs:restriction base="xs:string">
- <xs:minLength value="1"/>
- <xs:maxLength value="60"/>
- <!-- FESA Fields have max. 60 characters. Since For each Register a field is generated, we have to use this limit -->
- <xs:pattern value="[_A-Za-z]+[_A-Za-z0-9]*"/>
- </xs:restriction>
- </xs:simpleType>
- <xs:simpleType name="FormatType">
- <xs:restriction base="xs:string">
- <xs:enumeration value="uint8"/>
- <xs:enumeration value="int8"/>
- <xs:enumeration value="uint16"/>
- <xs:enumeration value="int16"/>
- <xs:enumeration value="uint32"/>
- <xs:enumeration value="int32"/>
- <xs:enumeration value="uint64"/>
- <xs:enumeration value="int64"/>
- <xs:enumeration value="float32"/>
- <xs:enumeration value="float64"/>
- <xs:enumeration value="date"/>
- <xs:enumeration value="char"/>
- <xs:enumeration value="byte"/>
- <xs:enumeration value="word"/>
- <xs:enumeration value="dword"/>
- <xs:enumeration value="int"/>
- <xs:enumeration value="dint"/>
- <xs:enumeration value="real"/>
- <xs:enumeration value="dt"/>
- </xs:restriction>
- </xs:simpleType>
+<xs:simpleType name="BlockNameType">
+ <xs:restriction base="xs:string">
+ <xs:minLength value="1"/>
+ <xs:maxLength value="30"/>
+ <!-- Siemens Support bezüglich der maximalen Zeichenlänge für PLC- Tags : S7-300/1200/1500er bei 128 Zeichen -->
+ <!-- FESA PropertyNames have max. 30 characters. Since For each Block a prop is generated, we have to use this limit -->
+ <xs:pattern value="[_A-Za-z]+[_A-Za-z0-9]*"/>
+ </xs:restriction>
+</xs:simpleType>
+<xs:simpleType name="RegisterNameType">
+ <xs:restriction base="xs:string">
+ <xs:minLength value="1"/>
+ <xs:maxLength value="60"/>
+ <!-- FESA Fields have max. 60 characters. Since For each Register a field is generated, we have to use this limit -->
+ <xs:pattern value="[_A-Za-z]+[_A-Za-z0-9]*"/>
+ </xs:restriction>
+</xs:simpleType>
+<xs:simpleType name="FormatType">
+ <xs:restriction base="xs:string">
+ <xs:enumeration value="uint8"/>
+ <xs:enumeration value="int8"/>
+ <xs:enumeration value="uint16"/>
+ <xs:enumeration value="int16"/>
+ <xs:enumeration value="uint32"/>
+ <xs:enumeration value="int32"/>
+ <xs:enumeration value="uint64"/>
+ <xs:enumeration value="int64"/>
+ <xs:enumeration value="float32"/>
+ <xs:enumeration value="float64"/>
+ <xs:enumeration value="date"/>
+ <xs:enumeration value="char"/>
+ <xs:enumeration value="byte"/>
+ <xs:enumeration value="word"/>
+ <xs:enumeration value="dword"/>
+ <xs:enumeration value="int"/>
+ <xs:enumeration value="dint"/>
+ <xs:enumeration value="real"/>
+ <xs:enumeration value="dt"/>
+ </xs:restriction>
+</xs:simpleType>
+
+<xs:simpleType name="DimensionType">
+ <xs:restriction base="xs:unsignedInt">
+ <xs:minInclusive value="1"/>
+ </xs:restriction>
+</xs:simpleType>
+<xs:simpleType name="LengthType">
+ <xs:restriction base="xs:unsignedInt">
+ <xs:minInclusive value="2"/>
+ <xs:maxInclusive value="254"/>
+ </xs:restriction>
+</xs:simpleType>
- <xs:simpleType name="DimensionType">
- <xs:restriction base="xs:unsignedInt">
- <xs:minInclusive value="1"/>
- </xs:restriction>
- </xs:simpleType>
- <xs:simpleType name="LengthType">
- <xs:restriction base="xs:unsignedInt">
- <xs:minInclusive value="2"/>
- <xs:maxInclusive value="254"/>
- </xs:restriction>
- </xs:simpleType>
</xs:schema>