diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_BC9020.exp b/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_BC9020.exp
index db9ec3db27e3da588dda7281f46815659add0885..9d6b4483663c66175cb1b81a057989090284d3cf 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_BC9020.exp
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_BC9020.exp
@@ -11,13 +11,13 @@ VAR_GLOBAL
     _version_a781_SilecsHeader AT %MW0: STRING(16):= DEV;
 
     (*SilecsHeader/SilecsHeader/hdrBlk *)
-    _checksum_a781_SilecsHeader AT %MW9: DWORD:= 2843029646;
+    _checksum_a781_SilecsHeader AT %MW9: DWORD:= 3184721915;
 
     (*SilecsHeader/SilecsHeader/hdrBlk *)
     _user_a781_SilecsHeader AT %MW11: STRING(16):= 'schwinn';
 
     (*SilecsHeader/SilecsHeader/hdrBlk *)
-    _date_a781_SilecsHeader AT %MW20: DT:= DT#2016-7-14-16:7:52;
+    _date_a781_SilecsHeader AT %MW20: DT:= DT#2017-6-6-16:14:51;
 
     (*AllTypes/testDevice1/MyROBlock *)
     RO_int8_a583_testDevice1 AT %MW24: SINT;
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_CX9020.exp b/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_CX9020.exp
index c05bd13cac550027757c98b4f380c2e74742e07c..ca7f7a28e2249eefe282fe85892183eda49b2262 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_CX9020.exp
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Beckhoff_CX9020.exp
@@ -11,13 +11,13 @@ VAR_GLOBAL
     _version_a781_SilecsHeader AT %MW0: STRING(16):= DEV;
 
     (*SilecsHeader/SilecsHeader/hdrBlk *)
-    _checksum_a781_SilecsHeader AT %MW20: DWORD:= 427563505;
+    _checksum_a781_SilecsHeader AT %MW20: DWORD:= 656547166;
 
     (*SilecsHeader/SilecsHeader/hdrBlk *)
     _user_a781_SilecsHeader AT %MW24: STRING(16):= 'schwinn';
 
     (*SilecsHeader/SilecsHeader/hdrBlk *)
-    _date_a781_SilecsHeader AT %MW44: DT:= DT#2016-7-14-16:8:13;
+    _date_a781_SilecsHeader AT %MW44: DT:= DT#2017-6-6-16:14:51;
 
     (*AllTypes/testDevice1/MyROBlock *)
     RO_int8_a583_testDevice1 AT %MW52: SINT;
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_BlockMode.h b/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_BlockMode.h
index 51ea9947fa4c6188656a5d80ce18f068f59b5f79..655863d17d0c4be5a6249107134b4cc2c39dbc90 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_BlockMode.h
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_BlockMode.h
@@ -183,13 +183,13 @@ int SILECS_init()
 	strcpy((unsigned char *)silecsData.data.SilecsHeader_hdrBlk.device[0]._version, "SILECS_DEV");
 	
 	/* Silecs checksum initialization */
-	silecsData.data.SilecsHeader_hdrBlk.device[0]._checksum  = 3940683809;
+	silecsData.data.SilecsHeader_hdrBlk.device[0]._checksum  = 1525793519;
 	
 	/* Silecs user initialization */
 	strcpy((unsigned char *)silecsData.data.SilecsHeader_hdrBlk.device[0]._user, "schwinn");
 	
 	/* Silecs date initialization */
-	SILECS_set_dt(3,48,8,16,14,7,2016,&silecsData.data.SilecsHeader_hdrBlk.device[0]._date);
+	SILECS_set_dt(1,51,14,16,6,6,2017,&silecsData.data.SilecsHeader_hdrBlk.device[0]._date);
 }
 
 /*
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_DeviceMode.h b/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_DeviceMode.h
index d382f9dedbd147e7ceb37aaee84bafcdd6d2a32d..3c6d1da52beed0b8bb6eb3779f408fd6d1ea89ff 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_DeviceMode.h
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Rabbit_DeviceMode.h
@@ -176,13 +176,13 @@ int SILECS_init()
 	strcpy((unsigned char *)silecsData.data.SilecsHeader_device[0].hdrBlk._version, "SILECS_DEV");
 	
 	/* Silecs checksum initialization */
-	silecsData.data.SilecsHeader_device[0].hdrBlk._checksum  = 3940683809;
+	silecsData.data.SilecsHeader_device[0].hdrBlk._checksum  = 1525793519;
 	
 	/* Silecs user initialization */
 	strcpy((unsigned char *)silecsData.data.SilecsHeader_device[0].hdrBlk._user, "schwinn");
 	
 	/* Silecs date initialization */
-	SILECS_set_dt(3,0,9,16,14,7,2016,&silecsData.data.SilecsHeader_device[0].hdrBlk._date);
+	SILECS_set_dt(1,51,14,16,6,6,2017,&silecsData.data.SilecsHeader_device[0].hdrBlk._date);
 }
 
 /*
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_M340.xsy b/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_M340.xsy
index 580607556a28904252eb1297249febefba9f35b4..6d8d7b2eef0221f4008124b8d72dcef7f2beb4f0 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_M340.xsy
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_M340.xsy
@@ -5,7 +5,7 @@
       <comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
     </variables>
     <variables name="_checksum_a781_SilecsHeader" typeName="DWORD" topologicalAddress="%MW8">
-      <variableInit value="3940683809"/>
+      <variableInit value="1525793519"/>
       <comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
     </variables>
     <variables name="_user_a781_SilecsHeader" typeName="STRING[16]" topologicalAddress="%MW10">
@@ -13,7 +13,7 @@
       <comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
     </variables>
     <variables name="_date_a781_SilecsHeader" typeName="DT" topologicalAddress="%MW18">
-      <variableInit value="DT#2016-7-14-16:8:24"/>
+      <variableInit value="DT#2017-6-6-16:14:51"/>
       <comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
     </variables>
     <variables name="RO_int8_a583_testDevice1" typeName="WORD" topologicalAddress="%MW22">
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_PremiumQuantum.xsy b/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_PremiumQuantum.xsy
index 90041edc6d060edc6fb80aa7dcae9cc36fe24ce4..141da6b77d229bd68a8a5d63ed5133c240f39f11 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_PremiumQuantum.xsy
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Schneider_PremiumQuantum.xsy
@@ -5,7 +5,7 @@
       <comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
     </variables>
     <variables name="_checksum_a781_SilecsHeader" typeName="DWORD" topologicalAddress="%MW8">
-      <variableInit value="3940683809"/>
+      <variableInit value="1525793519"/>
       <comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
     </variables>
     <variables name="_user_a781_SilecsHeader" typeName="STRING[16]" topologicalAddress="%MW10">
@@ -13,7 +13,7 @@
       <comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
     </variables>
     <variables name="_date_a781_SilecsHeader" typeName="DT" topologicalAddress="%MW18">
-      <variableInit value="DT#2016-7-14-16:8:40"/>
+      <variableInit value="DT#2017-6-6-16:14:51"/>
       <comment>SilecsHeader/SilecsHeader/hdrBlk</comment>
     </variables>
     <variables name="RO_int8_a583_testDevice1" typeName="WORD" topologicalAddress="%MW22">
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Block.scl b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Block.scl
index c5cd604ba78e2a8c7f6a3015495d13ab24ffce06..2291db5ec1f1a6791c40613462f40feb83c072cf 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Block.scl
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Block.scl
@@ -8,9 +8,9 @@ FAMILY:    SILECS
 NAME:      UDTB
     STRUCT
         _version: STRING[16] := 'SILECS_DEV';
-        _checksum: DWORD := DW#16#eae21021;
+        _checksum: DWORD := DW#16#5af1c2ef;
         _user: STRING[16] := 'schwinn';
-        _date: DT := DT#2016-7-14-16:7:40;
+        _date: DT := DT#2017-6-6-16:14:50;
 
     END_STRUCT;
 END_TYPE
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Device.scl b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Device.scl
index 32b0476df75d8226bf16e2e4e9abc078fe75d716..f1c0a397fec4e2f87c7ca9384dbc740260718423 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Device.scl
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_Step7Device.scl
@@ -8,9 +8,9 @@ FAMILY:    SILECS
 NAME:      UDTB
     STRUCT
         _version: STRING[16] := 'SILECS_DEV';
-        _checksum: DWORD := DW#16#eae21021;
+        _checksum: DWORD := DW#16#5af1c2ef;
         _user: STRING[16] := 'schwinn';
-        _date: DT := DT#2016-7-14-16:7:24;
+        _date: DT := DT#2017-6-6-16:14:50;
 
     END_STRUCT;
 END_TYPE
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaBlock.scl b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaBlock.scl
index a12f7bd70ce4d6e013e361af12f490d175aade87..dd180fc933721d80cd1591f6358986d9030c1122 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaBlock.scl
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaBlock.scl
@@ -8,9 +8,9 @@ FAMILY:    SILECS
 NAME:      UDTB
     STRUCT
         _version: STRING[16] := 'SILECS_DEV';
-        _checksum: DWORD := DW#16#eae21021;
+        _checksum: DWORD := DW#16#5af1c2ef;
         _user: STRING[16] := 'schwinn';
-        _date: DT := DT#2016-7-14-16:7:12;
+        _date: DT := DT#2017-6-6-16:14:50;
 
     END_STRUCT;
 END_TYPE
diff --git a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaDevice.scl b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaDevice.scl
index 3f0ee9dc2884c6ddd4bb049ee7011a08f7a09c75..b796ba6d272aecfbfde4dc57942e6f962f7327ec 100644
--- a/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaDevice.scl
+++ b/silecs-codegen/src/xml/test/generated_correct/controller/Siemens_TiaDevice.scl
@@ -8,9 +8,9 @@ FAMILY:    SILECS
 NAME:      UDTB
     STRUCT
         _version: STRING[16] := 'SILECS_DEV';
-        _checksum: DWORD := DW#16#eae21021;
+        _checksum: DWORD := DW#16#5af1c2ef;
         _user: STRING[16] := 'schwinn';
-        _date: DT := DT#2016-7-14-16:6:23;
+        _date: DT := DT#2017-6-6-16:14:50;
 
     END_STRUCT;
 END_TYPE